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@ -1,3 +1,667 @@
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2020-10-06 Andrew MacLeod <amacleod@redhat.com>
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* flag-types.h (enum evrp_mode): New enumerated type EVRP_MODE_*.
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* common.opt (fevrp-mode): New undocumented flag.
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* gimple-ssa-evrp.c: Include gimple-range.h
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(class rvrp_folder): EVRP folding using ranger exclusively.
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(rvrp_folder::rvrp_folder): New.
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(rvrp_folder::~rvrp_folder): New.
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(rvrp_folder::value_of_expr): New. Use rangers value_of_expr.
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(rvrp_folder::value_on_edge): New. Use rangers value_on_edge.
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(rvrp_folder::value_of_Stmt): New. Use rangers value_of_stmt.
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(rvrp_folder::fold_stmt): New. Call the simplifier.
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(class hybrid_folder): EVRP folding using both engines.
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(hybrid_folder::hybrid_folder): New.
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(hybrid_folder::~hybrid_folder): New.
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(hybrid_folder::fold_stmt): New. Simplify with one engne, then the
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other.
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(hybrid_folder::value_of_expr): New. Use both value routines.
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(hybrid_folder::value_on_edge): New. Use both value routines.
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(hybrid_folder::value_of_stmt): New. Use both value routines.
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(hybrid_folder::choose_value): New. Choose between range_analzyer and
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rangers values.
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(execute_early_vrp): Choose a folder based on flag_evrp_mode.
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* vr-values.c (simplify_using_ranges::fold_cond): Try range_of_stmt
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first to see if it returns a value.
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(simplify_using_ranges::simplify_switch_using_ranges): Return true if
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any changes were made to the switch.
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2020-10-06 Andrew MacLeod <amacleod@redhat.com>
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* Makefile.in (OBJS): Add gimple-range*.o.
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* gimple-range.h: New file.
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* gimple-range.cc: New file.
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* gimple-range-cache.h: New file.
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* gimple-range-cache.cc: New file.
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* gimple-range-edge.h: New file.
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* gimple-range-edge.cc: New file.
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* gimple-range-gori.h: New file.
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* gimple-range-gori.cc: New file.
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2020-10-06 Dennis Zhang <dennis.zhang@arm.com>
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* config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes.
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2020-10-06 Tom de Vries <tdevries@suse.de>
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PR middle-end/90861
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* gimplify.c (gimplify_bind_expr): Handle lookup in
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oacc_declare_returns using key with decl-expr.
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2020-10-06 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
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* config/arm/iterators.md (MVE_types): Move mode iterator from mve.md to
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iterators.md.
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(MVE_VLD_ST): Likewise.
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(MVE_0): Likewise.
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(MVE_1): Likewise.
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(MVE_3): Likewise.
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(MVE_2): Likewise.
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(MVE_5): Likewise.
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(MVE_6): Likewise.
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(MVE_CNVT): Move mode attribute iterator from mve.md to iterators.md.
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(MVE_LANES): Likewise.
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(MVE_constraint): Likewise.
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(MVE_constraint1): Likewise.
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(MVE_constraint2): Likewise.
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(MVE_constraint3): Likewise.
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(MVE_pred): Likewise.
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(MVE_pred1): Likewise.
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(MVE_pred2): Likewise.
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(MVE_pred3): Likewise.
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(MVE_B_ELEM): Likewise.
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(MVE_H_ELEM): Likewise.
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(V_sz_elem1): Likewise.
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(V_extr_elem): Likewise.
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(earlyclobber_32): Likewise.
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(supf): Move int attribute from mve.md to iterators.md.
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(mode1): Likewise.
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(VCVTQ_TO_F): Move int iterator from mve.md to iterators.md.
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(VMVNQ_N): Likewise.
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(VREV64Q): Likewise.
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(VCVTQ_FROM_F): Likewise.
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(VREV16Q): Likewise.
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(VCVTAQ): Likewise.
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(VMVNQ): Likewise.
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(VDUPQ_N): Likewise.
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(VCLZQ): Likewise.
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(VADDVQ): Likewise.
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(VREV32Q): Likewise.
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(VMOVLBQ): Likewise.
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(VMOVLTQ): Likewise.
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(VCVTPQ): Likewise.
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(VCVTNQ): Likewise.
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(VCVTMQ): Likewise.
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(VADDLVQ): Likewise.
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(VCTPQ): Likewise.
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(VCTPQ_M): Likewise.
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(VCVTQ_N_TO_F): Likewise.
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(VCREATEQ): Likewise.
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(VSHRQ_N): Likewise.
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(VCVTQ_N_FROM_F): Likewise.
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(VADDLVQ_P): Likewise.
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(VCMPNEQ): Likewise.
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(VSHLQ): Likewise.
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(VABDQ): Likewise.
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(VADDQ_N): Likewise.
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(VADDVAQ): Likewise.
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(VADDVQ_P): Likewise.
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(VANDQ): Likewise.
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(VBICQ): Likewise.
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(VBRSRQ_N): Likewise.
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(VCADDQ_ROT270): Likewise.
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(VCADDQ_ROT90): Likewise.
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(VCMPEQQ): Likewise.
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(VCMPEQQ_N): Likewise.
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(VCMPNEQ_N): Likewise.
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(VEORQ): Likewise.
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(VHADDQ): Likewise.
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(VHADDQ_N): Likewise.
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(VHSUBQ): Likewise.
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(VHSUBQ_N): Likewise.
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(VMAXQ): Likewise.
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(VMAXVQ): Likewise.
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(VMINQ): Likewise.
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(VMINVQ): Likewise.
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(VMLADAVQ): Likewise.
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(VMULHQ): Likewise.
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(VMULLBQ_INT): Likewise.
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(VMULLTQ_INT): Likewise.
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(VMULQ): Likewise.
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(VMULQ_N): Likewise.
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(VORNQ): Likewise.
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(VORRQ): Likewise.
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(VQADDQ): Likewise.
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(VQADDQ_N): Likewise.
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(VQRSHLQ): Likewise.
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(VQRSHLQ_N): Likewise.
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(VQSHLQ): Likewise.
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(VQSHLQ_N): Likewise.
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(VQSHLQ_R): Likewise.
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(VQSUBQ): Likewise.
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(VQSUBQ_N): Likewise.
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(VRHADDQ): Likewise.
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(VRMULHQ): Likewise.
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(VRSHLQ): Likewise.
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(VRSHLQ_N): Likewise.
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(VRSHRQ_N): Likewise.
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(VSHLQ_N): Likewise.
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(VSHLQ_R): Likewise.
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(VSUBQ): Likewise.
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(VSUBQ_N): Likewise.
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(VADDLVAQ): Likewise.
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(VBICQ_N): Likewise.
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(VMLALDAVQ): Likewise.
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(VMLALDAVXQ): Likewise.
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(VMOVNBQ): Likewise.
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(VMOVNTQ): Likewise.
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(VORRQ_N): Likewise.
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(VQMOVNBQ): Likewise.
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(VQMOVNTQ): Likewise.
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(VSHLLBQ_N): Likewise.
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(VSHLLTQ_N): Likewise.
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(VRMLALDAVHQ): Likewise.
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(VBICQ_M_N): Likewise.
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(VCVTAQ_M): Likewise.
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(VCVTQ_M_TO_F): Likewise.
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(VQRSHRNBQ_N): Likewise.
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(VABAVQ): Likewise.
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(VSHLCQ): Likewise.
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(VRMLALDAVHAQ): Likewise.
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(VADDVAQ_P): Likewise.
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(VCLZQ_M): Likewise.
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(VCMPEQQ_M_N): Likewise.
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(VCMPEQQ_M): Likewise.
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(VCMPNEQ_M_N): Likewise.
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(VCMPNEQ_M): Likewise.
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(VDUPQ_M_N): Likewise.
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(VMAXVQ_P): Likewise.
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(VMINVQ_P): Likewise.
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(VMLADAVAQ): Likewise.
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(VMLADAVQ_P): Likewise.
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(VMLAQ_N): Likewise.
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(VMLASQ_N): Likewise.
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(VMVNQ_M): Likewise.
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(VPSELQ): Likewise.
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(VQDMLAHQ_N): Likewise.
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(VQRDMLAHQ_N): Likewise.
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(VQRDMLASHQ_N): Likewise.
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(VQRSHLQ_M_N): Likewise.
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(VQSHLQ_M_R): Likewise.
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(VREV64Q_M): Likewise.
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(VRSHLQ_M_N): Likewise.
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(VSHLQ_M_R): Likewise.
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(VSLIQ_N): Likewise.
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(VSRIQ_N): Likewise.
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(VMLALDAVQ_P): Likewise.
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(VQMOVNBQ_M): Likewise.
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(VMOVLTQ_M): Likewise.
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(VMOVNBQ_M): Likewise.
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(VRSHRNTQ_N): Likewise.
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(VORRQ_M_N): Likewise.
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(VREV32Q_M): Likewise.
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(VREV16Q_M): Likewise.
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(VQRSHRNTQ_N): Likewise.
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(VMOVNTQ_M): Likewise.
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(VMOVLBQ_M): Likewise.
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(VMLALDAVAQ): Likewise.
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(VQSHRNBQ_N): Likewise.
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(VSHRNBQ_N): Likewise.
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(VRSHRNBQ_N): Likewise.
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(VMLALDAVXQ_P): Likewise.
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(VQMOVNTQ_M): Likewise.
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(VMVNQ_M_N): Likewise.
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(VQSHRNTQ_N): Likewise.
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(VMLALDAVAXQ): Likewise.
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(VSHRNTQ_N): Likewise.
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(VCVTMQ_M): Likewise.
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(VCVTNQ_M): Likewise.
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(VCVTPQ_M): Likewise.
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(VCVTQ_M_N_FROM_F): Likewise.
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(VCVTQ_M_FROM_F): Likewise.
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(VRMLALDAVHQ_P): Likewise.
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(VADDLVAQ_P): Likewise.
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(VABAVQ_P): Likewise.
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(VSHLQ_M): Likewise.
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(VSRIQ_M_N): Likewise.
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(VSUBQ_M): Likewise.
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(VCVTQ_M_N_TO_F): Likewise.
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(VHSUBQ_M): Likewise.
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(VSLIQ_M_N): Likewise.
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(VRSHLQ_M): Likewise.
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(VMINQ_M): Likewise.
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(VMULLBQ_INT_M): Likewise.
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(VMULHQ_M): Likewise.
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(VMULQ_M): Likewise.
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(VHSUBQ_M_N): Likewise.
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(VHADDQ_M_N): Likewise.
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(VORRQ_M): Likewise.
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(VRMULHQ_M): Likewise.
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(VQADDQ_M): Likewise.
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(VRSHRQ_M_N): Likewise.
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(VQSUBQ_M_N): Likewise.
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(VADDQ_M): Likewise.
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(VORNQ_M): Likewise.
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(VRHADDQ_M): Likewise.
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(VQSHLQ_M): Likewise.
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(VANDQ_M): Likewise.
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(VBICQ_M): Likewise.
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(VSHLQ_M_N): Likewise.
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(VCADDQ_ROT270_M): Likewise.
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(VQRSHLQ_M): Likewise.
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(VQADDQ_M_N): Likewise.
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(VADDQ_M_N): Likewise.
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(VMAXQ_M): Likewise.
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(VQSUBQ_M): Likewise.
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(VMLASQ_M_N): Likewise.
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(VMLADAVAQ_P): Likewise.
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(VBRSRQ_M_N): Likewise.
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(VMULQ_M_N): Likewise.
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(VCADDQ_ROT90_M): Likewise.
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(VMULLTQ_INT_M): Likewise.
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(VEORQ_M): Likewise.
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(VSHRQ_M_N): Likewise.
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(VSUBQ_M_N): Likewise.
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(VHADDQ_M): Likewise.
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(VABDQ_M): Likewise.
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(VMLAQ_M_N): Likewise.
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(VQSHLQ_M_N): Likewise.
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(VMLALDAVAQ_P): Likewise.
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(VMLALDAVAXQ_P): Likewise.
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(VQRSHRNBQ_M_N): Likewise.
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(VQRSHRNTQ_M_N): Likewise.
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(VQSHRNBQ_M_N): Likewise.
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(VQSHRNTQ_M_N): Likewise.
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(VRSHRNBQ_M_N): Likewise.
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(VRSHRNTQ_M_N): Likewise.
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(VSHLLBQ_M_N): Likewise.
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(VSHLLTQ_M_N): Likewise.
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(VSHRNBQ_M_N): Likewise.
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(VSHRNTQ_M_N): Likewise.
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(VSTRWSBQ): Likewise.
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(VSTRBSOQ): Likewise.
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(VSTRBQ): Likewise.
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(VLDRBGOQ): Likewise.
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(VLDRBQ): Likewise.
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(VLDRWGBQ): Likewise.
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(VLD1Q): Likewise.
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(VLDRHGOQ): Likewise.
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(VLDRHGSOQ): Likewise.
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(VLDRHQ): Likewise.
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(VLDRWQ): Likewise.
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(VLDRDGBQ): Likewise.
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(VLDRDGOQ): Likewise.
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(VLDRDGSOQ): Likewise.
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(VLDRWGOQ): Likewise.
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(VLDRWGSOQ): Likewise.
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|
|
|
|
(VST1Q): Likewise.
|
|
|
|
|
(VSTRHSOQ): Likewise.
|
|
|
|
|
(VSTRHSSOQ): Likewise.
|
|
|
|
|
(VSTRHQ): Likewise.
|
|
|
|
|
(VSTRWQ): Likewise.
|
|
|
|
|
(VSTRDSBQ): Likewise.
|
|
|
|
|
(VSTRDSOQ): Likewise.
|
|
|
|
|
(VSTRDSSOQ): Likewise.
|
|
|
|
|
(VSTRWSOQ): Likewise.
|
|
|
|
|
(VSTRWSSOQ): Likewise.
|
|
|
|
|
(VSTRWSBWBQ): Likewise.
|
|
|
|
|
(VLDRWGBWBQ): Likewise.
|
|
|
|
|
(VSTRDSBWBQ): Likewise.
|
|
|
|
|
(VLDRDGBWBQ): Likewise.
|
|
|
|
|
(VADCIQ): Likewise.
|
|
|
|
|
(VADCIQ_M): Likewise.
|
|
|
|
|
(VSBCQ): Likewise.
|
|
|
|
|
(VSBCQ_M): Likewise.
|
|
|
|
|
(VSBCIQ): Likewise.
|
|
|
|
|
(VSBCIQ_M): Likewise.
|
|
|
|
|
(VADCQ): Likewise.
|
|
|
|
|
(VADCQ_M): Likewise.
|
|
|
|
|
(UQRSHLLQ): Likewise.
|
|
|
|
|
(SQRSHRLQ): Likewise.
|
|
|
|
|
(VSHLCQ_M): Likewise.
|
|
|
|
|
* config/arm/mve.md (MVE_types): Move mode iterator to iterators.md from mve.md.
|
|
|
|
|
(MVE_VLD_ST): Likewise.
|
|
|
|
|
(MVE_0): Likewise.
|
|
|
|
|
(MVE_1): Likewise.
|
|
|
|
|
(MVE_3): Likewise.
|
|
|
|
|
(MVE_2): Likewise.
|
|
|
|
|
(MVE_5): Likewise.
|
|
|
|
|
(MVE_6): Likewise.
|
|
|
|
|
(MVE_CNVT): Move mode attribute iterator to iterators.md from mve.md.
|
|
|
|
|
(MVE_LANES): Likewise.
|
|
|
|
|
(MVE_constraint): Likewise.
|
|
|
|
|
(MVE_constraint1): Likewise.
|
|
|
|
|
(MVE_constraint2): Likewise.
|
|
|
|
|
(MVE_constraint3): Likewise.
|
|
|
|
|
(MVE_pred): Likewise.
|
|
|
|
|
(MVE_pred1): Likewise.
|
|
|
|
|
(MVE_pred2): Likewise.
|
|
|
|
|
(MVE_pred3): Likewise.
|
|
|
|
|
(MVE_B_ELEM): Likewise.
|
|
|
|
|
(MVE_H_ELEM): Likewise.
|
|
|
|
|
(V_sz_elem1): Likewise.
|
|
|
|
|
(V_extr_elem): Likewise.
|
|
|
|
|
(earlyclobber_32): Likewise.
|
|
|
|
|
(supf): Move int attribute to iterators.md from mve.md.
|
|
|
|
|
(mode1): Likewise.
|
|
|
|
|
(VCVTQ_TO_F): Move int iterator to iterators.md from mve.md.
|
|
|
|
|
(VMVNQ_N): Likewise.
|
|
|
|
|
(VREV64Q): Likewise.
|
|
|
|
|
(VCVTQ_FROM_F): Likewise.
|
|
|
|
|
(VREV16Q): Likewise.
|
|
|
|
|
(VCVTAQ): Likewise.
|
|
|
|
|
(VMVNQ): Likewise.
|
|
|
|
|
(VDUPQ_N): Likewise.
|
|
|
|
|
(VCLZQ): Likewise.
|
|
|
|
|
(VADDVQ): Likewise.
|
|
|
|
|
(VREV32Q): Likewise.
|
|
|
|
|
(VMOVLBQ): Likewise.
|
|
|
|
|
(VMOVLTQ): Likewise.
|
|
|
|
|
(VCVTPQ): Likewise.
|
|
|
|
|
(VCVTNQ): Likewise.
|
|
|
|
|
(VCVTMQ): Likewise.
|
|
|
|
|
(VADDLVQ): Likewise.
|
|
|
|
|
(VCTPQ): Likewise.
|
|
|
|
|
(VCTPQ_M): Likewise.
|
|
|
|
|
(VCVTQ_N_TO_F): Likewise.
|
|
|
|
|
(VCREATEQ): Likewise.
|
|
|
|
|
(VSHRQ_N): Likewise.
|
|
|
|
|
(VCVTQ_N_FROM_F): Likewise.
|
|
|
|
|
(VADDLVQ_P): Likewise.
|
|
|
|
|
(VCMPNEQ): Likewise.
|
|
|
|
|
(VSHLQ): Likewise.
|
|
|
|
|
(VABDQ): Likewise.
|
|
|
|
|
(VADDQ_N): Likewise.
|
|
|
|
|
(VADDVAQ): Likewise.
|
|
|
|
|
(VADDVQ_P): Likewise.
|
|
|
|
|
(VANDQ): Likewise.
|
|
|
|
|
(VBICQ): Likewise.
|
|
|
|
|
(VBRSRQ_N): Likewise.
|
|
|
|
|
(VCADDQ_ROT270): Likewise.
|
|
|
|
|
(VCADDQ_ROT90): Likewise.
|
|
|
|
|
(VCMPEQQ): Likewise.
|
|
|
|
|
(VCMPEQQ_N): Likewise.
|
|
|
|
|
(VCMPNEQ_N): Likewise.
|
|
|
|
|
(VEORQ): Likewise.
|
|
|
|
|
(VHADDQ): Likewise.
|
|
|
|
|
(VHADDQ_N): Likewise.
|
|
|
|
|
(VHSUBQ): Likewise.
|
|
|
|
|
(VHSUBQ_N): Likewise.
|
|
|
|
|
(VMAXQ): Likewise.
|
|
|
|
|
(VMAXVQ): Likewise.
|
|
|
|
|
(VMINQ): Likewise.
|
|
|
|
|
(VMINVQ): Likewise.
|
|
|
|
|
(VMLADAVQ): Likewise.
|
|
|
|
|
(VMULHQ): Likewise.
|
|
|
|
|
(VMULLBQ_INT): Likewise.
|
|
|
|
|
(VMULLTQ_INT): Likewise.
|
|
|
|
|
(VMULQ): Likewise.
|
|
|
|
|
(VMULQ_N): Likewise.
|
|
|
|
|
(VORNQ): Likewise.
|
|
|
|
|
(VORRQ): Likewise.
|
|
|
|
|
(VQADDQ): Likewise.
|
|
|
|
|
(VQADDQ_N): Likewise.
|
|
|
|
|
(VQRSHLQ): Likewise.
|
|
|
|
|
(VQRSHLQ_N): Likewise.
|
|
|
|
|
(VQSHLQ): Likewise.
|
|
|
|
|
(VQSHLQ_N): Likewise.
|
|
|
|
|
(VQSHLQ_R): Likewise.
|
|
|
|
|
(VQSUBQ): Likewise.
|
|
|
|
|
(VQSUBQ_N): Likewise.
|
|
|
|
|
(VRHADDQ): Likewise.
|
|
|
|
|
(VRMULHQ): Likewise.
|
|
|
|
|
(VRSHLQ): Likewise.
|
|
|
|
|
(VRSHLQ_N): Likewise.
|
|
|
|
|
(VRSHRQ_N): Likewise.
|
|
|
|
|
(VSHLQ_N): Likewise.
|
|
|
|
|
(VSHLQ_R): Likewise.
|
|
|
|
|
(VSUBQ): Likewise.
|
|
|
|
|
(VSUBQ_N): Likewise.
|
|
|
|
|
(VADDLVAQ): Likewise.
|
|
|
|
|
(VBICQ_N): Likewise.
|
|
|
|
|
(VMLALDAVQ): Likewise.
|
|
|
|
|
(VMLALDAVXQ): Likewise.
|
|
|
|
|
(VMOVNBQ): Likewise.
|
|
|
|
|
(VMOVNTQ): Likewise.
|
|
|
|
|
(VORRQ_N): Likewise.
|
|
|
|
|
(VQMOVNBQ): Likewise.
|
|
|
|
|
(VQMOVNTQ): Likewise.
|
|
|
|
|
(VSHLLBQ_N): Likewise.
|
|
|
|
|
(VSHLLTQ_N): Likewise.
|
|
|
|
|
(VRMLALDAVHQ): Likewise.
|
|
|
|
|
(VBICQ_M_N): Likewise.
|
|
|
|
|
(VCVTAQ_M): Likewise.
|
|
|
|
|
(VCVTQ_M_TO_F): Likewise.
|
|
|
|
|
(VQRSHRNBQ_N): Likewise.
|
|
|
|
|
(VABAVQ): Likewise.
|
|
|
|
|
(VSHLCQ): Likewise.
|
|
|
|
|
(VRMLALDAVHAQ): Likewise.
|
|
|
|
|
(VADDVAQ_P): Likewise.
|
|
|
|
|
(VCLZQ_M): Likewise.
|
|
|
|
|
(VCMPEQQ_M_N): Likewise.
|
|
|
|
|
(VCMPEQQ_M): Likewise.
|
|
|
|
|
(VCMPNEQ_M_N): Likewise.
|
|
|
|
|
(VCMPNEQ_M): Likewise.
|
|
|
|
|
(VDUPQ_M_N): Likewise.
|
|
|
|
|
(VMAXVQ_P): Likewise.
|
|
|
|
|
(VMINVQ_P): Likewise.
|
|
|
|
|
(VMLADAVAQ): Likewise.
|
|
|
|
|
(VMLADAVQ_P): Likewise.
|
|
|
|
|
(VMLAQ_N): Likewise.
|
|
|
|
|
(VMLASQ_N): Likewise.
|
|
|
|
|
(VMVNQ_M): Likewise.
|
|
|
|
|
(VPSELQ): Likewise.
|
|
|
|
|
(VQDMLAHQ_N): Likewise.
|
|
|
|
|
(VQRDMLAHQ_N): Likewise.
|
|
|
|
|
(VQRDMLASHQ_N): Likewise.
|
|
|
|
|
(VQRSHLQ_M_N): Likewise.
|
|
|
|
|
(VQSHLQ_M_R): Likewise.
|
|
|
|
|
(VREV64Q_M): Likewise.
|
|
|
|
|
(VRSHLQ_M_N): Likewise.
|
|
|
|
|
(VSHLQ_M_R): Likewise.
|
|
|
|
|
(VSLIQ_N): Likewise.
|
|
|
|
|
(VSRIQ_N): Likewise.
|
|
|
|
|
(VMLALDAVQ_P): Likewise.
|
|
|
|
|
(VQMOVNBQ_M): Likewise.
|
|
|
|
|
(VMOVLTQ_M): Likewise.
|
|
|
|
|
(VMOVNBQ_M): Likewise.
|
|
|
|
|
(VRSHRNTQ_N): Likewise.
|
|
|
|
|
(VORRQ_M_N): Likewise.
|
|
|
|
|
(VREV32Q_M): Likewise.
|
|
|
|
|
(VREV16Q_M): Likewise.
|
|
|
|
|
(VQRSHRNTQ_N): Likewise.
|
|
|
|
|
(VMOVNTQ_M): Likewise.
|
|
|
|
|
(VMOVLBQ_M): Likewise.
|
|
|
|
|
(VMLALDAVAQ): Likewise.
|
|
|
|
|
(VQSHRNBQ_N): Likewise.
|
|
|
|
|
(VSHRNBQ_N): Likewise.
|
|
|
|
|
(VRSHRNBQ_N): Likewise.
|
|
|
|
|
(VMLALDAVXQ_P): Likewise.
|
|
|
|
|
(VQMOVNTQ_M): Likewise.
|
|
|
|
|
(VMVNQ_M_N): Likewise.
|
|
|
|
|
(VQSHRNTQ_N): Likewise.
|
|
|
|
|
(VMLALDAVAXQ): Likewise.
|
|
|
|
|
(VSHRNTQ_N): Likewise.
|
|
|
|
|
(VCVTMQ_M): Likewise.
|
|
|
|
|
(VCVTNQ_M): Likewise.
|
|
|
|
|
(VCVTPQ_M): Likewise.
|
|
|
|
|
(VCVTQ_M_N_FROM_F): Likewise.
|
|
|
|
|
(VCVTQ_M_FROM_F): Likewise.
|
|
|
|
|
(VRMLALDAVHQ_P): Likewise.
|
|
|
|
|
(VADDLVAQ_P): Likewise.
|
|
|
|
|
(VABAVQ_P): Likewise.
|
|
|
|
|
(VSHLQ_M): Likewise.
|
|
|
|
|
(VSRIQ_M_N): Likewise.
|
|
|
|
|
(VSUBQ_M): Likewise.
|
|
|
|
|
(VCVTQ_M_N_TO_F): Likewise.
|
|
|
|
|
(VHSUBQ_M): Likewise.
|
|
|
|
|
(VSLIQ_M_N): Likewise.
|
|
|
|
|
(VRSHLQ_M): Likewise.
|
|
|
|
|
(VMINQ_M): Likewise.
|
|
|
|
|
(VMULLBQ_INT_M): Likewise.
|
|
|
|
|
(VMULHQ_M): Likewise.
|
|
|
|
|
(VMULQ_M): Likewise.
|
|
|
|
|
(VHSUBQ_M_N): Likewise.
|
|
|
|
|
(VHADDQ_M_N): Likewise.
|
|
|
|
|
(VORRQ_M): Likewise.
|
|
|
|
|
(VRMULHQ_M): Likewise.
|
|
|
|
|
(VQADDQ_M): Likewise.
|
|
|
|
|
(VRSHRQ_M_N): Likewise.
|
|
|
|
|
(VQSUBQ_M_N): Likewise.
|
|
|
|
|
(VADDQ_M): Likewise.
|
|
|
|
|
(VORNQ_M): Likewise.
|
|
|
|
|
(VRHADDQ_M): Likewise.
|
|
|
|
|
(VQSHLQ_M): Likewise.
|
|
|
|
|
(VANDQ_M): Likewise.
|
|
|
|
|
(VBICQ_M): Likewise.
|
|
|
|
|
(VSHLQ_M_N): Likewise.
|
|
|
|
|
(VCADDQ_ROT270_M): Likewise.
|
|
|
|
|
(VQRSHLQ_M): Likewise.
|
|
|
|
|
(VQADDQ_M_N): Likewise.
|
|
|
|
|
(VADDQ_M_N): Likewise.
|
|
|
|
|
(VMAXQ_M): Likewise.
|
|
|
|
|
(VQSUBQ_M): Likewise.
|
|
|
|
|
(VMLASQ_M_N): Likewise.
|
|
|
|
|
(VMLADAVAQ_P): Likewise.
|
|
|
|
|
(VBRSRQ_M_N): Likewise.
|
|
|
|
|
(VMULQ_M_N): Likewise.
|
|
|
|
|
(VCADDQ_ROT90_M): Likewise.
|
|
|
|
|
(VMULLTQ_INT_M): Likewise.
|
|
|
|
|
(VEORQ_M): Likewise.
|
|
|
|
|
(VSHRQ_M_N): Likewise.
|
|
|
|
|
(VSUBQ_M_N): Likewise.
|
|
|
|
|
(VHADDQ_M): Likewise.
|
|
|
|
|
(VABDQ_M): Likewise.
|
|
|
|
|
(VMLAQ_M_N): Likewise.
|
|
|
|
|
(VQSHLQ_M_N): Likewise.
|
|
|
|
|
(VMLALDAVAQ_P): Likewise.
|
|
|
|
|
(VMLALDAVAXQ_P): Likewise.
|
|
|
|
|
(VQRSHRNBQ_M_N): Likewise.
|
|
|
|
|
(VQRSHRNTQ_M_N): Likewise.
|
|
|
|
|
(VQSHRNBQ_M_N): Likewise.
|
|
|
|
|
(VQSHRNTQ_M_N): Likewise.
|
|
|
|
|
(VRSHRNBQ_M_N): Likewise.
|
|
|
|
|
(VRSHRNTQ_M_N): Likewise.
|
|
|
|
|
(VSHLLBQ_M_N): Likewise.
|
|
|
|
|
(VSHLLTQ_M_N): Likewise.
|
|
|
|
|
(VSHRNBQ_M_N): Likewise.
|
|
|
|
|
(VSHRNTQ_M_N): Likewise.
|
|
|
|
|
(VSTRWSBQ): Likewise.
|
|
|
|
|
(VSTRBSOQ): Likewise.
|
|
|
|
|
(VSTRBQ): Likewise.
|
|
|
|
|
(VLDRBGOQ): Likewise.
|
|
|
|
|
(VLDRBQ): Likewise.
|
|
|
|
|
(VLDRWGBQ): Likewise.
|
|
|
|
|
(VLD1Q): Likewise.
|
|
|
|
|
(VLDRHGOQ): Likewise.
|
|
|
|
|
(VLDRHGSOQ): Likewise.
|
|
|
|
|
(VLDRHQ): Likewise.
|
|
|
|
|
(VLDRWQ): Likewise.
|
|
|
|
|
(VLDRDGBQ): Likewise.
|
|
|
|
|
(VLDRDGOQ): Likewise.
|
|
|
|
|
(VLDRDGSOQ): Likewise.
|
|
|
|
|
(VLDRWGOQ): Likewise.
|
|
|
|
|
(VLDRWGSOQ): Likewise.
|
|
|
|
|
(VST1Q): Likewise.
|
|
|
|
|
(VSTRHSOQ): Likewise.
|
|
|
|
|
(VSTRHSSOQ): Likewise.
|
|
|
|
|
(VSTRHQ): Likewise.
|
|
|
|
|
(VSTRWQ): Likewise.
|
|
|
|
|
(VSTRDSBQ): Likewise.
|
|
|
|
|
(VSTRDSOQ): Likewise.
|
|
|
|
|
(VSTRDSSOQ): Likewise.
|
|
|
|
|
(VSTRWSOQ): Likewise.
|
|
|
|
|
(VSTRWSSOQ): Likewise.
|
|
|
|
|
(VSTRWSBWBQ): Likewise.
|
|
|
|
|
(VLDRWGBWBQ): Likewise.
|
|
|
|
|
(VSTRDSBWBQ): Likewise.
|
|
|
|
|
(VLDRDGBWBQ): Likewise.
|
|
|
|
|
(VADCIQ): Likewise.
|
|
|
|
|
(VADCIQ_M): Likewise.
|
|
|
|
|
(VSBCQ): Likewise.
|
|
|
|
|
(VSBCQ_M): Likewise.
|
|
|
|
|
(VSBCIQ): Likewise.
|
|
|
|
|
(VSBCIQ_M): Likewise.
|
|
|
|
|
(VADCQ): Likewise.
|
|
|
|
|
(VADCQ_M): Likewise.
|
|
|
|
|
(UQRSHLLQ): Likewise.
|
|
|
|
|
(SQRSHRLQ): Likewise.
|
|
|
|
|
(VSHLCQ_M): Likewise.
|
|
|
|
|
(define_c_enum "unspec"): Move MVE enumerator to unspecs.md from mve.md.
|
|
|
|
|
* config/arm/unspecs.md (define_c_enum "unspec"): Move MVE enumerator from
|
|
|
|
|
mve.md to unspecs.md.
|
|
|
|
|
|
|
|
|
|
2020-10-06 Martin Liska <mliska@suse.cz>
|
|
|
|
|
|
|
|
|
|
* common.opt: Remove -fdbg-cnt-list from deferred options.
|
|
|
|
|
* dbgcnt.c (dbg_cnt_set_limit_by_index): Make a copy
|
|
|
|
|
to original_limits.
|
|
|
|
|
(dbg_cnt_list_all_counters): Print also current counter value
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and print to stderr.
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* opts-global.c (handle_common_deferred_options): Do not handle
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-fdbg-cnt-list.
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* opts.c (common_handle_option): Likewise.
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* toplev.c (finalize): Handle it after compilation here.
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2020-10-06 Martin Liska <mliska@suse.cz>
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* dbgcnt.c (dbg_cnt): Report also upper limit.
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2020-10-06 Tom de Vries <tdevries@suse.de>
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* tracer.c (count_insns): Rename to ...
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(analyze_bb): ... this.
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(cache_can_duplicate_bb_p, cached_can_duplicate_bb_p): New function.
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(ignore_bb_p): Use cached_can_duplicate_bb_p.
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(tail_duplicate): Call cache_can_duplicate_bb_p.
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2020-10-06 Tom de Vries <tdevries@suse.de>
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* tracer.c (can_duplicate_insn_p, can_duplicate_bb_no_insn_iter_p)
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(can_duplicate_bb_p): New function, factored out of ...
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(ignore_bb_p): ... here.
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2020-10-06 Jakub Jelinek <jakub@redhat.com>
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PR rtl-optimization/97282
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* tree-ssa-math-opts.c (divmod_candidate_p): Don't return false for
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constant op2 if it is not a power of two and the type has precision
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larger than HOST_BITS_PER_WIDE_INT or BITS_PER_WORD.
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* internal-fn.c (contains_call_div_mod): New function.
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(expand_DIVMOD): If last argument is a constant, try to expand it as
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TRUNC_DIV_EXPR followed by TRUNC_MOD_EXPR, but if the sequence
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contains any calls or {,U}{DIV,MOD} rtxes, throw it away and use
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divmod optab or divmod libfunc.
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2020-10-06 Aldy Hernandez <aldyh@redhat.com>
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* value-range.h (irange_allocator::allocate): Increase
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newir storage by one.
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2020-10-06 Jakub Jelinek <jakub@redhat.com>
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PR middle-end/97289
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* omp-offload.c (omp_discover_declare_target_tgt_fn_r): Only follow
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node->alias_target if it is a FUNCTION_DECL.
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2020-10-06 Joe Ramsay <joe.ramsay@arm.com>
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* config/arm/arm-cpus.in:
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(ALL_FPU_INTERNAL): Remove vfp_base.
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(VFPv2): Remove vfp_base.
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(MVE): Remove vfp_base.
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(vfp_base): Redefine as implied bit dependent on MVE or FP
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(cortex-m55): Add flags to disable MVE, MVE FP, FP and DSP extensions.
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* config/arm/arm.c (arm_configure_build_target): Add implied bits to ISA.
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* config/arm/parsecpu.awk:
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(gen_isa): Print implied bits and their dependencies to ISA header.
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(gen_data): Add parsing for implied feature bits.
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2020-10-06 Andreas Krebbel <krebbel@linux.ibm.com>
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* doc/invoke.texi: Add z15/arch13 to the list of documented
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-march/-mtune options.
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2020-10-05 Dennis Zhang <dennis.zhang@arm.com>
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* config/arm/arm.c (arm_preferred_simd_mode): Enable MVE SIMD modes.
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GCC Administrator