rs6000.c (print_operand): Check (TARGET_SPE || TARGET_E500_DOUBLE), not TARGET_E500, for %y.
* config/rs6000/rs6000.c (print_operand): Check (TARGET_SPE || TARGET_E500_DOUBLE), not TARGET_E500, for %y. (rs6000_generate_compare, rs6000_emit_sCOND, output_cbranch, rs6000_emit_cmove): Don't check TARGET_E500. * config/rs6000/rs6000.md (bunordered, bordered, sunordered, sordered): Don't check TARGET_E500. From-SVN: r120339
This commit is contained in:
parent
d8934cf1e3
commit
8ef65e3da8
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@ -1,3 +1,12 @@
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2007-01-02 Joseph Myers <joseph@codesourcery.com>
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* config/rs6000/rs6000.c (print_operand): Check (TARGET_SPE ||
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TARGET_E500_DOUBLE), not TARGET_E500, for %y.
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(rs6000_generate_compare, rs6000_emit_sCOND, output_cbranch,
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rs6000_emit_cmove): Don't check TARGET_E500.
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* config/rs6000/rs6000.md (bunordered, bordered, sunordered,
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sordered): Don't check TARGET_E500.
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2007-01-01 Eric Christopher <echristo@apple.com>
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* config/mips/mips.c (mips_regno_mode_ok_for_base_p): Use
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@ -1,6 +1,6 @@
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/* Subroutines used for code generation on IBM RS/6000.
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Copyright (C) 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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2000, 2001, 2002, 2003, 2004, 2005, 2006
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2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
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Free Software Foundation, Inc.
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Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
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@ -11016,7 +11016,8 @@ print_operand (FILE *file, rtx x, int code)
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tmp = XEXP (x, 0);
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/* Ugly hack because %y is overloaded. */
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if (TARGET_E500 && GET_MODE_SIZE (GET_MODE (x)) == 8)
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if ((TARGET_SPE || TARGET_E500_DOUBLE)
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&& GET_MODE_SIZE (GET_MODE (x)) == 8)
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{
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/* Handle [reg]. */
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if (GET_CODE (tmp) == REG)
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@ -11315,7 +11316,7 @@ rs6000_generate_compare (enum rtx_code code)
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compare_result = gen_reg_rtx (comp_mode);
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/* E500 FP compare instructions on the GPRs. Yuck! */
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if ((TARGET_E500 && !TARGET_FPRS && TARGET_HARD_FLOAT)
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if ((!TARGET_FPRS && TARGET_HARD_FLOAT)
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&& rs6000_compare_fp_p)
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{
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rtx cmp, or_result, compare_result2;
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@ -11508,7 +11509,7 @@ rs6000_generate_compare (enum rtx_code code)
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under flag_finite_math_only we don't bother. */
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if (rs6000_compare_fp_p
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&& !flag_finite_math_only
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&& !(TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)
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&& !(TARGET_HARD_FLOAT && !TARGET_FPRS)
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&& (code == LE || code == GE
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|| code == UNEQ || code == LTGT
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|| code == UNGT || code == UNLT))
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@ -11558,7 +11559,7 @@ rs6000_emit_sCOND (enum rtx_code code, rtx result)
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condition_rtx = rs6000_generate_compare (code);
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cond_code = GET_CODE (condition_rtx);
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if (TARGET_E500 && rs6000_compare_fp_p
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if (rs6000_compare_fp_p
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&& !TARGET_FPRS && TARGET_HARD_FLOAT)
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{
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rtx t;
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@ -11665,7 +11666,7 @@ output_cbranch (rtx op, const char *label, int reversed, rtx insn)
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code = reverse_condition (code);
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}
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if ((TARGET_E500 && !TARGET_FPRS && TARGET_HARD_FLOAT) && mode == CCFPmode)
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if ((!TARGET_FPRS && TARGET_HARD_FLOAT) && mode == CCFPmode)
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{
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/* The efscmp/tst* instructions twiddle bit 2, which maps nicely
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to the GT bit. */
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@ -12081,7 +12082,7 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond)
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return rs6000_emit_int_cmove (dest, op, true_cond, false_cond);
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return 0;
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}
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else if (TARGET_E500 && TARGET_HARD_FLOAT && !TARGET_FPRS
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else if (TARGET_HARD_FLOAT && !TARGET_FPRS
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&& SCALAR_FLOAT_MODE_P (compare_mode))
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return 0;
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@ -1,6 +1,6 @@
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;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
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;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
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;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
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;; 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
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;; Free Software Foundation, Inc.
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;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
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@ -11421,12 +11421,12 @@
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(define_expand "bunordered"
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[(use (match_operand 0 "" ""))]
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"! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
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"! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
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"{ rs6000_emit_cbranch (UNORDERED, operands[0]); DONE; }")
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(define_expand "bordered"
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[(use (match_operand 0 "" ""))]
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"! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
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"! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
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"{ rs6000_emit_cbranch (ORDERED, operands[0]); DONE; }")
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(define_expand "buneq"
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@ -11555,12 +11555,12 @@
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(define_expand "sunordered"
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[(clobber (match_operand:SI 0 "gpc_reg_operand" ""))]
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"! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
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"! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
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"{ rs6000_emit_sCOND (UNORDERED, operands[0]); DONE; }")
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(define_expand "sordered"
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[(clobber (match_operand:SI 0 "gpc_reg_operand" ""))]
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"! (TARGET_HARD_FLOAT && TARGET_E500 && !TARGET_FPRS)"
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"! (TARGET_HARD_FLOAT && !TARGET_FPRS)"
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"{ rs6000_emit_sCOND (ORDERED, operands[0]); DONE; }")
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(define_expand "suneq"
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