diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 26142bad936..3acd9637a28 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2014-05-20  Nick Clifton  <nickc@redhat.com>
+
+	* config/msp430/msp430.md (zero_extendpsisi2): Use + constraint on
+	operand 0 in order to prevent confusion about the number of
+	registers involved.
+
 2014-05-20  Richard Biener  <rguenther@suse.de>
 
 	PR tree-optimization/61221
diff --git a/gcc/config/msp430/msp430.md b/gcc/config/msp430/msp430.md
index ceff537c31d..ecdc49359bf 100644
--- a/gcc/config/msp430/msp430.md
+++ b/gcc/config/msp430/msp430.md
@@ -618,9 +618,15 @@
 ; when the PSI value is negative..
 ;
 ; Note: using PUSHM.A #1 is two bytes smaller than using PUSHX.A....
+;
+; Note: We use a + constraint on operand 0 as otherwise GCC gets confused
+; about extending a single PSI mode register into a pair of SImode registers
+; with the same starting register.  It thinks that the upper register of
+; the pair is unused and so it can clobber it.  Try compiling 20050826-2.c
+; at -O2 to see this.
 
 (define_insn "zero_extendpsisi2"
-  [(set (match_operand:SI                  0 "register_operand" "=r")
+  [(set (match_operand:SI                  0 "register_operand" "+r")
 	(zero_extend:SI (match_operand:PSI 1 "register_operand" "r")))]
   ""
   "*