re PR target/87198 (ICE in extract_insn, at recog.c:2304)

PR target/87198
	* common/config/i386/i386-common.c (OPTION_MASK_ISA_XSAVEOPT_SET,
	OPTION_MASK_ISA_XSAVES_SET, OPTION_MASK_ISA_XSAVEC_SET): Use
	OPTION_MASK_ISA_XSAVE_SET instead of OPTION_MASK_ISA_XSAVE.
	(OPTION_MASK_ISA_XSAVE_UNSET): Add OPTION_MASK_ISA_XSAVES_UNSET
	and OPTION_MASK_ISA_XSAVEC_UNSET.

	* gcc.target/i386/pr87198.c: New test.

From-SVN: r264088
This commit is contained in:
Jakub Jelinek 2018-09-04 19:49:57 +02:00 committed by Jakub Jelinek
parent 2a17b23970
commit 8f93810d3b
4 changed files with 32 additions and 4 deletions

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@ -1,3 +1,12 @@
2018-09-04 Jakub Jelinek <jakub@redhat.com>
PR target/87198
* common/config/i386/i386-common.c (OPTION_MASK_ISA_XSAVEOPT_SET,
OPTION_MASK_ISA_XSAVES_SET, OPTION_MASK_ISA_XSAVEC_SET): Use
OPTION_MASK_ISA_XSAVE_SET instead of OPTION_MASK_ISA_XSAVE.
(OPTION_MASK_ISA_XSAVE_UNSET): Add OPTION_MASK_ISA_XSAVES_UNSET
and OPTION_MASK_ISA_XSAVEC_UNSET.
2018-09-04 Max Filippov <jcmvbkbc@gmail.com>
* config/xtensa/xtensa.c (xtensa_expand_atomic): Reorder AND and

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@ -59,7 +59,7 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_FXSR_SET OPTION_MASK_ISA_FXSR
#define OPTION_MASK_ISA_XSAVE_SET OPTION_MASK_ISA_XSAVE
#define OPTION_MASK_ISA_XSAVEOPT_SET \
(OPTION_MASK_ISA_XSAVEOPT | OPTION_MASK_ISA_XSAVE)
(OPTION_MASK_ISA_XSAVEOPT | OPTION_MASK_ISA_XSAVE_SET)
#define OPTION_MASK_ISA_AVX512F_SET \
(OPTION_MASK_ISA_AVX512F | OPTION_MASK_ISA_AVX2_SET)
#define OPTION_MASK_ISA_AVX512CD_SET \
@ -95,9 +95,9 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_PREFETCHWT1_SET OPTION_MASK_ISA_PREFETCHWT1
#define OPTION_MASK_ISA_CLFLUSHOPT_SET OPTION_MASK_ISA_CLFLUSHOPT
#define OPTION_MASK_ISA_XSAVES_SET \
(OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_XSAVE)
(OPTION_MASK_ISA_XSAVES | OPTION_MASK_ISA_XSAVE_SET)
#define OPTION_MASK_ISA_XSAVEC_SET \
(OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE)
(OPTION_MASK_ISA_XSAVEC | OPTION_MASK_ISA_XSAVE_SET)
#define OPTION_MASK_ISA_CLWB_SET OPTION_MASK_ISA_CLWB
/* SSE4 includes both SSE4.1 and SSE4.2. -msse4 should be the same
@ -185,7 +185,8 @@ along with GCC; see the file COPYING3. If not see
#define OPTION_MASK_ISA_FMA_UNSET OPTION_MASK_ISA_FMA
#define OPTION_MASK_ISA_FXSR_UNSET OPTION_MASK_ISA_FXSR
#define OPTION_MASK_ISA_XSAVE_UNSET \
(OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_XSAVEOPT_UNSET)
(OPTION_MASK_ISA_XSAVE | OPTION_MASK_ISA_XSAVEOPT_UNSET \
| OPTION_MASK_ISA_XSAVES_UNSET | OPTION_MASK_ISA_XSAVEC_UNSET)
#define OPTION_MASK_ISA_XSAVEOPT_UNSET OPTION_MASK_ISA_XSAVEOPT
#define OPTION_MASK_ISA_AVX2_UNSET \
(OPTION_MASK_ISA_AVX2 | OPTION_MASK_ISA_AVX512F_UNSET)

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@ -1,3 +1,8 @@
2018-09-04 Jakub Jelinek <jakub@redhat.com>
PR target/87198
* gcc.target/i386/pr87198.c: New test.
2018-09-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
PR target/86744

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@ -0,0 +1,13 @@
/* PR target/87198 */
/* { dg-do compile } */
/* { dg-options "-O2 -mxsavec -mno-xsave" } */
#include <x86intrin.h>
void
test_xsavec (void *__A, long long __B)
{
_xsavec (__A, __B);
}
/* { dg-error "target specific option mismatch" "" { target *-*-* } 0 } */