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[AArch64][3/5] Remove dead code 

2015-09-20  Wilco Dijkstra  <wdijkstr@arm.com>

	* config/aarch64/aarch64.c (aarch64_bitmasks): Remove.
	(AARCH64_NUM_BITMASKS): Remove.
	(aarch64_bitmasks_cmp): Remove.
	(aarch64_build_bitmask_table): Remove.

From-SVN: r227948
This commit is contained in:
Wilco Dijkstra 2015-09-20 16:41:26 +00:00 committed by Jiong Wang
parent 62c8d76c10
commit 8fcbb4e328
2 changed files with 7 additions and 69 deletions
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7
gcc/ChangeLog
View File

@ -1,3 +1,10 @@
2015-09-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_bitmasks): Remove.
(AARCH64_NUM_BITMASKS): Remove.
(aarch64_bitmasks_cmp): Remove.
(aarch64_build_bitmask_table): Remove.
2015-09-20 Wilco Dijkstra <wdijkstr@arm.com>
* config/aarch64/aarch64.c (aarch64_internal_mov_immediate): Replace

69
gcc/config/aarch64/aarch64.c
View File

@ -563,12 +563,6 @@ static const struct aarch64_option_extension all_extensions[] =
increment address. */
static machine_mode aarch64_memory_reference_mode;
/* A table of valid AArch64 "bitmask immediate" values for
logical instructions. */
#define AARCH64_NUM_BITMASKS 5334
static unsigned HOST_WIDE_INT aarch64_bitmasks[AARCH64_NUM_BITMASKS];
typedef enum aarch64_cond_code
{
AARCH64_EQ = 0, AARCH64_NE, AARCH64_CS, AARCH64_CC, AARCH64_MI, AARCH64_PL,
@ -3263,67 +3257,6 @@ aarch64_tls_referenced_p (rtx x)
}
static int
aarch64_bitmasks_cmp (const void *i1, const void *i2)
{
const unsigned HOST_WIDE_INT *imm1 = (const unsigned HOST_WIDE_INT *) i1;
const unsigned HOST_WIDE_INT *imm2 = (const unsigned HOST_WIDE_INT *) i2;
if (*imm1 < *imm2)
return -1;
if (*imm1 > *imm2)
return +1;
return 0;
}
static void
aarch64_build_bitmask_table (void)
{
unsigned HOST_WIDE_INT mask, imm;
unsigned int log_e, e, s, r;
unsigned int nimms = 0;
for (log_e = 1; log_e <= 6; log_e++)
{
e = 1 << log_e;
if (e == 64)
mask = ~(HOST_WIDE_INT) 0;
else
mask = ((HOST_WIDE_INT) 1 << e) - 1;
for (s = 1; s < e; s++)
{
for (r = 0; r < e; r++)
{
/* set s consecutive bits to 1 (s < 64) */
imm = ((unsigned HOST_WIDE_INT)1 << s) - 1;
/* rotate right by r */
if (r != 0)
imm = ((imm >> r) | (imm << (e - r))) & mask;
/* replicate the constant depending on SIMD size */
switch (log_e) {
case 1: imm |= (imm << 2);
case 2: imm |= (imm << 4);
case 3: imm |= (imm << 8);
case 4: imm |= (imm << 16);
case 5: imm |= (imm << 32);
case 6:
break;
default:
gcc_unreachable ();
}
gcc_assert (nimms < AARCH64_NUM_BITMASKS);
aarch64_bitmasks[nimms++] = imm;
}
}
}
gcc_assert (nimms == AARCH64_NUM_BITMASKS);
qsort (aarch64_bitmasks, nimms, sizeof (aarch64_bitmasks[0]),
aarch64_bitmasks_cmp);
}
/* Return true if val can be encoded as a 12-bit unsigned immediate with
a left shift of 0 or 12 bits. */
bool
@ -8059,8 +7992,6 @@ aarch64_override_options (void)
|| (aarch64_arch_string && valid_arch))
gcc_assert (explicit_arch != aarch64_no_arch);
aarch64_build_bitmask_table ();
aarch64_override_options_internal (&global_options);
/* Save these options as the default ones in case we push and pop them later