[AArch64][3/5] Remove dead code
2015-09-20 Wilco Dijkstra <wdijkstr@arm.com> * config/aarch64/aarch64.c (aarch64_bitmasks): Remove. (AARCH64_NUM_BITMASKS): Remove. (aarch64_bitmasks_cmp): Remove. (aarch64_build_bitmask_table): Remove. From-SVN: r227948
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@ -1,3 +1,10 @@
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2015-09-20 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64.c (aarch64_bitmasks): Remove.
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(AARCH64_NUM_BITMASKS): Remove.
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(aarch64_bitmasks_cmp): Remove.
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(aarch64_build_bitmask_table): Remove.
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2015-09-20 Wilco Dijkstra <wdijkstr@arm.com>
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* config/aarch64/aarch64.c (aarch64_internal_mov_immediate): Replace
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@ -563,12 +563,6 @@ static const struct aarch64_option_extension all_extensions[] =
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increment address. */
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static machine_mode aarch64_memory_reference_mode;
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/* A table of valid AArch64 "bitmask immediate" values for
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logical instructions. */
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#define AARCH64_NUM_BITMASKS 5334
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static unsigned HOST_WIDE_INT aarch64_bitmasks[AARCH64_NUM_BITMASKS];
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typedef enum aarch64_cond_code
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{
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AARCH64_EQ = 0, AARCH64_NE, AARCH64_CS, AARCH64_CC, AARCH64_MI, AARCH64_PL,
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@ -3263,67 +3257,6 @@ aarch64_tls_referenced_p (rtx x)
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}
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static int
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aarch64_bitmasks_cmp (const void *i1, const void *i2)
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{
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const unsigned HOST_WIDE_INT *imm1 = (const unsigned HOST_WIDE_INT *) i1;
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const unsigned HOST_WIDE_INT *imm2 = (const unsigned HOST_WIDE_INT *) i2;
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if (*imm1 < *imm2)
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return -1;
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if (*imm1 > *imm2)
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return +1;
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return 0;
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}
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static void
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aarch64_build_bitmask_table (void)
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{
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unsigned HOST_WIDE_INT mask, imm;
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unsigned int log_e, e, s, r;
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unsigned int nimms = 0;
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for (log_e = 1; log_e <= 6; log_e++)
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{
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e = 1 << log_e;
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if (e == 64)
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mask = ~(HOST_WIDE_INT) 0;
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else
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mask = ((HOST_WIDE_INT) 1 << e) - 1;
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for (s = 1; s < e; s++)
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{
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for (r = 0; r < e; r++)
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{
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/* set s consecutive bits to 1 (s < 64) */
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imm = ((unsigned HOST_WIDE_INT)1 << s) - 1;
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/* rotate right by r */
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if (r != 0)
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imm = ((imm >> r) | (imm << (e - r))) & mask;
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/* replicate the constant depending on SIMD size */
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switch (log_e) {
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case 1: imm |= (imm << 2);
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case 2: imm |= (imm << 4);
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case 3: imm |= (imm << 8);
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case 4: imm |= (imm << 16);
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case 5: imm |= (imm << 32);
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case 6:
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break;
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default:
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gcc_unreachable ();
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}
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gcc_assert (nimms < AARCH64_NUM_BITMASKS);
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aarch64_bitmasks[nimms++] = imm;
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}
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}
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}
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gcc_assert (nimms == AARCH64_NUM_BITMASKS);
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qsort (aarch64_bitmasks, nimms, sizeof (aarch64_bitmasks[0]),
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aarch64_bitmasks_cmp);
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}
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/* Return true if val can be encoded as a 12-bit unsigned immediate with
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a left shift of 0 or 12 bits. */
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bool
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@ -8059,8 +7992,6 @@ aarch64_override_options (void)
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|| (aarch64_arch_string && valid_arch))
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gcc_assert (explicit_arch != aarch64_no_arch);
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aarch64_build_bitmask_table ();
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aarch64_override_options_internal (&global_options);
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/* Save these options as the default ones in case we push and pop them later
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