config.gcc (hppa*-*-linux*): Set MASK_NO_SPACE_REGS in target_cpu_default.
* config.gcc (hppa*-*-linux*): Set MASK_NO_SPACE_REGS in target_cpu_default. * pa.c (attr_length_call): Add 8 to call length (long indirect PA 1.X) if not MASK_NO_SPACE_REGS. (output_call): Adjust return pointer, don't load new space register into %sr0, and use %sr4 for call if TARGET_NO_SPACE_REGS is true. (pa_asm_output_mi_thunk): Don't load new space register into %sr0 if TARGET_NO_SPACE_REGS is true. * pa.md (return_external_pic): Add TARGET_NO_SPACE_REGS to insn conditions. (epilogue): Always use return_internal if TARGET_NO_SPACE_REGS is true. (interspace_jump): Add new pattern for when TARGET_NO_SPACE_REGS is true. Use bve when TARGET_64BIT is true. From-SVN: r62497
This commit is contained in:
parent
61b56b2e4b
commit
90330d3193
@ -1,3 +1,19 @@
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2003-02-06 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
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* config.gcc (hppa*-*-linux*): Set MASK_NO_SPACE_REGS in
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target_cpu_default.
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* pa.c (attr_length_call): Add 8 to call length (long indirect PA 1.X)
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if not MASK_NO_SPACE_REGS.
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(output_call): Adjust return pointer, don't load new space register
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into %sr0, and use %sr4 for call if TARGET_NO_SPACE_REGS is true.
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(pa_asm_output_mi_thunk): Don't load new space register into %sr0 if
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TARGET_NO_SPACE_REGS is true.
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* pa.md (return_external_pic): Add TARGET_NO_SPACE_REGS to insn
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conditions.
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(epilogue): Always use return_internal if TARGET_NO_SPACE_REGS is true.
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(interspace_jump): Add new pattern for when TARGET_NO_SPACE_REGS is
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true. Use bve when TARGET_64BIT is true.
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2003-02-06 Richard Henderson <rth@redhat.com>
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* combine.c (nonzero_bits): Fix double break.
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@ -785,7 +785,7 @@ hppa*64*-*-linux* | parisc*64*-*-linux*)
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need_64bit_hwint=yes
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;;
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hppa*-*-linux* | parisc*-*-linux*)
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target_cpu_default="MASK_PA_11"
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target_cpu_default="MASK_PA_11 | MASK_NO_SPACE_REGS"
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tm_file="${tm_file} dbxelf.h elfos.h svr4.h linux.h pa/pa-linux.h \
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pa/pa32-regs.h pa/pa32-linux.h"
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tmake_file="t-slibgcc-elf-ver t-linux pa/t-linux"
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@ -6532,10 +6532,13 @@ attr_length_call (insn, sibcall)
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if (TARGET_PA_20)
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return (length + 32);
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if (!TARGET_NO_SPACE_REGS)
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length += 8;
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if (!sibcall)
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length += 8;
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return (length + 40);
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return (length + 32);
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}
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}
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}
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@ -6730,7 +6733,10 @@ output_call (insn, call_dest, sibcall)
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if (!sibcall && !TARGET_PA_20)
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{
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output_asm_insn ("{bl|b,l} .+8,%%r2", xoperands);
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output_asm_insn ("addi 16,%%r2,%%r2", xoperands);
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if (TARGET_NO_SPACE_REGS)
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output_asm_insn ("addi 8,%%r2,%%r2", xoperands);
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else
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output_asm_insn ("addi 16,%%r2,%%r2", xoperands);
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}
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}
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@ -6752,14 +6758,23 @@ output_call (insn, call_dest, sibcall)
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}
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else
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{
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output_asm_insn ("ldsid (%%r1),%%r31\n\tmtsp %%r31,%%sr0",
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xoperands);
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if (!TARGET_NO_SPACE_REGS)
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output_asm_insn ("ldsid (%%r1),%%r31\n\tmtsp %%r31,%%sr0",
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xoperands);
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if (sibcall)
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output_asm_insn ("be 0(%%sr0,%%r1)", xoperands);
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{
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if (TARGET_NO_SPACE_REGS)
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output_asm_insn ("be 0(%%sr4,%%r1)", xoperands);
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else
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output_asm_insn ("be 0(%%sr0,%%r1)", xoperands);
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}
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else
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{
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output_asm_insn ("ble 0(%%sr0,%%r1)", xoperands);
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if (TARGET_NO_SPACE_REGS)
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output_asm_insn ("ble 0(%%sr4,%%r1)", xoperands);
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else
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output_asm_insn ("ble 0(%%sr0,%%r1)", xoperands);
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if (indirect_call)
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output_asm_insn ("stw %%r31,-24(%%sp)", xoperands);
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@ -7026,7 +7041,7 @@ pa_asm_output_mi_thunk (file, thunk_fndecl, delta, vcall_offset, function)
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pa_output_function_prologue (file, 0);
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if (VAL_14_BITS_P (delta))
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{
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if (! TARGET_64BIT && ! TARGET_PORTABLE_RUNTIME && flag_pic)
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if (!TARGET_64BIT && !TARGET_PORTABLE_RUNTIME && flag_pic)
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{
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fprintf (file, "\taddil LT'%s,%%r19\n", lab);
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fprintf (file, "\tldw RT'%s(%%r1),%%r22\n", lab);
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@ -7035,8 +7050,14 @@ pa_asm_output_mi_thunk (file, thunk_fndecl, delta, vcall_offset, function)
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fprintf (file, "\tdepi 0,31,2,%%r22\n");
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fprintf (file, "\tldw 4(%%sr0,%%r22),%%r19\n");
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fprintf (file, "\tldw 0(%%sr0,%%r22),%%r22\n");
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fprintf (file, "\tldsid (%%sr0,%%r22),%%r1\n\tmtsp %%r1,%%sr0\n");
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fprintf (file, "\tbe 0(%%sr0,%%r22)\n\tldo ");
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if (TARGET_NO_SPACE_REGS)
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fprintf (file, "\tbe 0(%%sr4,%%r22)\n\tldo ");
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else
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{
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fprintf (file, "\tldsid (%%sr0,%%r22),%%r1\n");
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fprintf (file, "\tmtsp %%r1,%%sr0\n");
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fprintf (file, "\tbe 0(%%sr0,%%r22)\n\tldo ");
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}
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fprintf (file, HOST_WIDE_INT_PRINT_DEC, delta);
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fprintf (file, "(%%r26),%%r26\n");
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}
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@ -7049,7 +7070,7 @@ pa_asm_output_mi_thunk (file, thunk_fndecl, delta, vcall_offset, function)
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}
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else
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{
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if (! TARGET_64BIT && ! TARGET_PORTABLE_RUNTIME && flag_pic)
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if (!TARGET_64BIT && !TARGET_PORTABLE_RUNTIME && flag_pic)
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{
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fprintf (file, "\taddil L'");
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fprintf (file, HOST_WIDE_INT_PRINT_DEC, delta);
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@ -7063,8 +7084,14 @@ pa_asm_output_mi_thunk (file, thunk_fndecl, delta, vcall_offset, function)
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fprintf (file, "\tdepi 0,31,2,%%r22\n");
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fprintf (file, "\tldw 4(%%sr0,%%r22),%%r19\n");
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fprintf (file, "\tldw 0(%%sr0,%%r22),%%r22\n");
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fprintf (file, "\tldsid (%%sr0,%%r22),%%r1\n\tmtsp %%r1,%%sr0\n");
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fprintf (file, "\tbe,n 0(%%sr0,%%r22)\n");
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if (TARGET_NO_SPACE_REGS)
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fprintf (file, "\tbe 0(%%sr4,%%r22)");
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else
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{
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fprintf (file, "\tldsid (%%sr0,%%r22),%%r1\n");
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fprintf (file, "\tmtsp %%r1,%%sr0\n");
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fprintf (file, "\tbe,n 0(%%sr0,%%r22)\n");
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}
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}
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else
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{
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@ -5629,7 +5629,7 @@
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[(return)
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(clobber (reg:SI 1))
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(use (reg:SI 2))]
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"flag_pic && current_function_calls_eh_return"
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"!TARGET_NO_SPACE_REGS && flag_pic && current_function_calls_eh_return"
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"ldsid (%%sr0,%%r2),%%r1\;mtsp %%r1,%%sr0\;be%* 0(%%sr0,%%r2)"
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[(set_attr "type" "branch")
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(set_attr "length" "12")])
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@ -5665,8 +5665,10 @@
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/* EH returns bypass the normal return stub. Thus, we must do an
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interspace branch to return from functions that call eh_return.
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This is only a problem for returns from shared code. */
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if (flag_pic && current_function_calls_eh_return)
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This is only a problem for returns from shared code on ports
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using space registers. */
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if (!TARGET_NO_SPACE_REGS
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&& flag_pic && current_function_calls_eh_return)
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x = gen_return_external_pic ();
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else
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x = gen_return_internal ();
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@ -6997,7 +6999,8 @@
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;;; EH does longjmp's from and within the data section. Thus,
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;;; an interspace branch is required for the longjmp implementation.
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;;; Registers r1 and r2 are used as scratch registers for the jump.
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;;; Registers r1 and r2 are used as scratch registers for the jump
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;;; when necessary.
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(define_expand "interspace_jump"
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[(parallel
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[(set (pc) (match_operand 0 "pmode_register_operand" "a"))
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@ -7008,6 +7011,22 @@
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operands[1] = gen_rtx_REG (word_mode, 2);
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}")
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(define_insn ""
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[(set (pc) (match_operand 0 "pmode_register_operand" "a"))
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(clobber (reg:SI 2))]
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"TARGET_PA_20 && !TARGET_64BIT"
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"bve%* (%0)"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn ""
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[(set (pc) (match_operand 0 "pmode_register_operand" "a"))
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(clobber (reg:SI 2))]
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"TARGET_NO_SPACE_REGS && !TARGET_64BIT"
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"be%* 0(%%sr4,%0)"
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[(set_attr "type" "branch")
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(set_attr "length" "4")])
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(define_insn ""
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[(set (pc) (match_operand 0 "pmode_register_operand" "a"))
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(clobber (reg:SI 2))]
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@ -7020,9 +7039,9 @@
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[(set (pc) (match_operand 0 "pmode_register_operand" "a"))
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(clobber (reg:DI 2))]
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"TARGET_64BIT"
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"ldsid (%%sr0,%0),%%r2\; mtsp %%r2,%%sr0\; be%* 0(%%sr0,%0)"
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"bve%* (%0)"
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[(set_attr "type" "branch")
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(set_attr "length" "12")])
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(set_attr "length" "4")])
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(define_expand "builtin_longjmp"
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[(unspec_volatile [(match_operand 0 "register_operand" "r")] 3)]
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