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re PR target/78458 (LRA ICE building libgcc for powerpc-linux-gnuspe e500v2)

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gcc/
	PR target/78458
	* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Return MODE
	if it is at least NREGS wide.

gcc/testsuite/
	PR target/78458
	* gcc.target/powerpc/pr78458.c: New.

From-SVN: r242818
This commit is contained in:
Peter Bergner 2016-11-23 20:07:51 -06:00 committed by Peter Bergner
parent 890a4eb056
commit 90b725f0b0
4 changed files with 31 additions and 3 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2016-11-23 Peter Bergner <bergner@vnet.ibm.com>
PR target/78458
* config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Return MODE
if it is at least NREGS wide.
2016-11-23 Joseph Myers <joseph@codesourcery.com>
* config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For

8
gcc/config/rs6000/rs6000.h
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@ -1279,9 +1279,11 @@ enum data_align { align_abi, align_opt, align_both };
enough space to account for vectors in FP regs. However, TFmode/TDmode
should not use VSX instructions to do a caller save. */
#define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS, MODE) \
(TARGET_VSX \
&& ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \
&& FP_REGNO_P (REGNO) \
((NREGS) <= rs6000_hard_regno_nregs[MODE][REGNO] \
? (MODE) \
: TARGET_VSX \
&& ((MODE) == VOIDmode || ALTIVEC_OR_VSX_VECTOR_MODE (MODE)) \
&& FP_REGNO_P (REGNO) \
? V2DFmode \
: TARGET_E500_DOUBLE && (MODE) == SImode \
? SImode \

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2016-11-23 Peter Bergner <bergner@vnet.ibm.com>
PR target/78458
* gcc.target/powerpc/pr78458.c: New.
2016-11-23 Joseph Myers <joseph@codesourcery.com>
* gcc.c-torture/compile/20161123-1.c: New test.

15
gcc/testsuite/gcc.target/powerpc/pr78458.c Normal file
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@ -0,0 +1,15 @@
/* { dg-do compile } */
/* { dg-options "-mcpu=8548 -mspe -mabi=spe -mlra" } */
/* { dg-skip-if "not an SPE target" { ! powerpc_spe_nocache } } */
extern void bar (void);
long double
pr78458 (long double p1)
{
bar ();
asm volatile ("# clobbers" :::
"r14", "r15", "r16", "r17", "r18", "r19",
"r20", "r21", "r22", "r23", "r24", "r25",
"r26", "r27", "r28", "r29", "r30", "r31");
return p1;
}