From 9106d8d2153532281e2527d997e2a570ac06669b Mon Sep 17 00:00:00 2001
From: "David S. Miller" <davem@davemloft.net>
Date: Wed, 24 Oct 2012 05:59:27 +0000
Subject: [PATCH] Use define_memory_constraint on sparc when necessary.

	* config/sparc/constraints.md ("T", "W"): Change
	definitions to use define_memory_constraint.  Do not match
	'reg'.
	* config/sparc/sparc.c (memory_ok_for_ldd): Remove all non-MEM
	handling code, update comment.

From-SVN: r192757
---
 gcc/ChangeLog                   |  8 ++++++++
 gcc/config/sparc/constraints.md |  8 ++++----
 gcc/config/sparc/sparc.c        | 25 +++++++------------------
 3 files changed, 19 insertions(+), 22 deletions(-)

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9b780ee7c37..e5714c5e847 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2012-10-23  David S. Miller  <davem@davemloft.net>
+
+	* config/sparc/constraints.md ("T", "W"): Change
+	definitions to use define_memory_constraint.  Do not match
+	'reg'.
+	* config/sparc/sparc.c (memory_ok_for_ldd): Remove all non-MEM
+	handling code, update comment.
+
 2012-10-23  Ian Lance Taylor  <iant@google.com>
 
 	* doc/extend.texi (Extended Asm): The '+' constraint does not
diff --git a/gcc/config/sparc/constraints.md b/gcc/config/sparc/constraints.md
index 472490f2624..ffe530447db 100644
--- a/gcc/config/sparc/constraints.md
+++ b/gcc/config/sparc/constraints.md
@@ -132,10 +132,10 @@
       (match_test "fp_high_losum_p (op)")))
 
 ;; Not needed in 64-bit mode
-(define_constraint "T"
+(define_memory_constraint "T"
  "Memory reference whose address is aligned to 8-byte boundary"
  (and (match_test "TARGET_ARCH32")
-      (match_code "mem,reg")
+      (match_code "mem")
       (match_test "memory_ok_for_ldd (op)")))
 
 ;; Not needed in 64-bit mode
@@ -148,9 +148,9 @@
       (match_test "register_ok_for_ldd (op)")))
 
 ;; Equivalent to 'T' but available in 64-bit mode
-(define_constraint "W"
+(define_memory_constraint "W"
  "Memory reference for 'e' constraint floating-point register"
- (and (match_code "mem,reg")
+ (and (match_code "mem")
       (match_test "memory_ok_for_ldd (op)")))
 
 (define_constraint "Y"
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 8849c03a90a..272632eecba 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -8065,29 +8065,18 @@ register_ok_for_ldd (rtx reg)
   return 1;
 }
 
-/* Return 1 if OP is a memory whose address is known to be
-   aligned to 8-byte boundary, or a pseudo during reload.
-   This makes it suitable for use in ldd and std insns.  */
+/* Return 1 if OP, a MEM, has an address which is known to be
+   aligned to an 8-byte boundary.  */
 
 int
 memory_ok_for_ldd (rtx op)
 {
-  if (MEM_P (op))
-    {
-      /* In 64-bit mode, we assume that the address is word-aligned.  */
-      if (TARGET_ARCH32 && !mem_min_alignment (op, 8))
-	return 0;
+  /* In 64-bit mode, we assume that the address is word-aligned.  */
+  if (TARGET_ARCH32 && !mem_min_alignment (op, 8))
+    return 0;
 
-      if (! can_create_pseudo_p ()
-	  && !strict_memory_address_p (Pmode, XEXP (op, 0)))
-	return 0;
-    }
-  else if (REG_P (op) && REGNO (op) >= FIRST_PSEUDO_REGISTER)
-    {
-      if (!(reload_in_progress && reg_renumber [REGNO (op)] < 0))
-	return 0;
-    }
-  else
+  if (! can_create_pseudo_p ()
+      && !strict_memory_address_p (Pmode, XEXP (op, 0)))
     return 0;
 
   return 1;