MMX/SSE patterns for i386

From-SVN: r36270

gcc/ChangeLog

@@ -1,3 +1,39 @@
+2000-09-08  Bernd Schmidt  <bernds@redhat.co.uk>
+
+	* i386-protos.h (sse_comparison_operator, mmx_reg_operand): Declare
+	new functions.
+	* i386.c (sse_comparison_operator, mmx_reg_operand): New functions.
+	* i386.md (attr "type"): Add sse and mmx types.
+	(attr "memory"): Handle them without a crash.
+	(movsi_1, movdi_2): Allow MMX regs.
+	(movdi splits): Don't split moves involving MMX regs.
+	(setcc_4): Remove '*' from pattern name so we get a gen_setcc4.
+	(movv4sf_internal, movv4si_internal, movv8qi_internal,
+	movv4hi_internal, movv2si_internal, movv8qi, movv4hi, movv2si,
+	movv4sf, movv4si, pushv4sf, pushv4si, pushv8qi, pushv4hi, pushv2si,
+	sse_movaps, sse_movups, sse_movmskps, mmx_pmovmskb, mmx_maskmovq,
+	sse_movntv4sf, sse_movntdi, sse_movhlps, sse_movlhps, sse_movhps,
+	sse_movlps, sse_loadss, sse_movss, sse_storess, sse_shufps,
+	addv4sf3, vmaddv4sf3, subv4sf3, vmsubv4sf3, mulv4sf3, vmmulv4sf3,
+	divv4sf3, vmdivv4sf3, rcpv4sf2, vmrcpv4sf2, rsqrtv4sf2, vmrsqrtv4sf2,
+	sqrtv4sf2, vmsqrtv4sf2, sse_andti3, sse_nandti3, sse_iorti3,
+ 	sse_xorti3, maskcmpv4sf3, maskncmpv4sf3, vmmaskcmpv4sf3,
+ 	vmmaskncmpv4sf3, sse_comi, sse_ucomi, sse_unpckhps, sse_unpcklps,
+	smaxv4sf3, vmsmaxv4sf3, sminv4sf3, vmsminv4sf3, cvtpi2ps, cvtps2pi,
+	cvttps2pi, cvtsi2ss, cvtss2si, cvttss2si, addv8qi3, addv4hi3,
+	addv2si3, ssaddv8qi3, ssaddv4hi3, usaddv8qi3, usaddv4hi3, subv8qi3,
+	subv4hi3, subv2si3, sssubv8qi3, sssubv4hi3, ussubv8qi3, ussubv4hi3,
+	mulv4hi3, smulv4hi3_highpart, umulv4hi3_highpart, mmx_pmaddwd,
+	mmx_iordi3, mmx_xordi3, mmx_anddi3, mmx_nanddi3, mmx_uavgv8qi3,
+	mmx_uavgv4hi3, mmx_psadbw, mmx_pinsrw, mmx_pextrw, mmx_pshufw,
+	eqv8qi3, eqv4hi3, eqv2si3, gtv8qi3, gtv4hi3, gtv2si3, umaxv8qi3,
+	smaxv4hi3, uminv8qi3, sminv4hi3, ashrv4hi3, ashrv2si3, lshrv4hi3,
+	lshrv2si3, mmx_lshrdi3, ashlv4hi3, ashlv2si3, mmx_ashldi3,
+	mmx_packsswb, mmx_packssdw, mmx_packuswb, mmx_punpckhbw,
+	mmx_punpckhwd, mmx_punpckhdq, mmx_punpcklbw, mmx_punpcklwd,
+	mmx_punpckldq, emms, sfence, ldmxcsr, prefetch, stmxcsr, sse_clrti,
+	mmx_clrdi): New patterns.
+
 2000-09-08  Richard Earnshaw  <rearnsha@arm.com>
 
 	* arm.c: Don't include tm.h directly.

gcc/config/i386/i386-protos.h

@@ -51,11 +51,13 @@ extern int const1_operand PARAMS ((rtx, enum machine_mode));
 extern int const248_operand PARAMS ((rtx, enum machine_mode));
 extern int incdec_operand PARAMS ((rtx, enum machine_mode));
 extern int reg_no_sp_operand PARAMS ((rtx, enum machine_mode));
+extern int mmx_reg_operand PARAMS ((rtx, enum machine_mode));
 extern int general_no_elim_operand PARAMS ((rtx, enum machine_mode));
 extern int nonmemory_no_elim_operand PARAMS ((rtx, enum machine_mode));
 extern int q_regs_operand PARAMS ((rtx, enum machine_mode));
 extern int non_q_regs_operand PARAMS ((rtx, enum machine_mode));
 extern int no_comparison_operator PARAMS ((rtx, enum machine_mode));
+extern int sse_comparison_operator PARAMS ((rtx, enum machine_mode));
 extern int fcmov_comparison_operator PARAMS ((rtx, enum machine_mode));
 extern int uno_comparison_operator PARAMS ((rtx, enum machine_mode));
 extern int cmp_fp_expander_operand PARAMS ((rtx, enum machine_mode));

gcc/config/i386/i386.c

@@ -1174,6 +1174,14 @@ reg_no_sp_operand (op, mode)
   return register_operand (op, mode);
 }
 
+int
+mmx_reg_operand (op, mode)
+     register rtx op;
+     enum machine_mode mode;
+{
+  return MMX_REG_P (op);
+}
+
 /* Return false if this is any eliminable register.  Otherwise
    general_operand.  */
 
@@ -1264,6 +1272,17 @@ no_comparison_operator (op, mode)
     }
 }
 
+/* Return 1 if OP is a comparison that can be used in the CMPSS/CMPPS
+   insns.  */
+int
+sse_comparison_operator (op, mode)
+     rtx op;
+     enum machine_mode mode ATTRIBUTE_UNUSED;
+{
+  enum rtx_code code = GET_CODE (op);
+  return code == EQ || code == LT || code == LE || code == UNORDERED;
+}
+
 /* Return 1 if OP is a comparison operator that can be issued by fcmov.  */
 
 int

gcc/config/i386/i386.h

@@ -2584,6 +2584,7 @@ do { long l;						\
   {"const1_operand", {CONST_INT}},					\
   {"const248_operand", {CONST_INT}},					\
   {"incdec_operand", {CONST_INT}},					\
+  {"mmx_reg_operand", {REG}},						\
   {"reg_no_sp_operand", {SUBREG, REG}},					\
   {"general_no_elim_operand", {CONST_INT, CONST_DOUBLE, CONST,		\
 			SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM}},	\
@@ -2592,6 +2593,7 @@ do { long l;						\
   {"non_q_regs_operand", {SUBREG, REG}},				\
   {"no_comparison_operator", {EQ, NE, LT, GE, LTU, GTU, LEU, GEU}},	\
   {"fcmov_comparison_operator", {EQ, NE, LTU, GTU, LEU, GEU}},		\
+  {"sse_comparison_operator", {EQ, LT, LE, UNORDERED }},		\
   {"uno_comparison_operator", {EQ, NE, LE, LT, GE, GT, LEU, LTU, GEU,	\
 			       GTU, UNORDERED, ORDERED}},		\
   {"cmp_fp_expander_operand", {CONST_DOUBLE, SUBREG, REG, MEM}},	\