* config/m32r/m32r.h (INITIALIZE_TRAMPOLINE): Revert previous delta and use gen_int_mode in place of GET_INT instead.
From-SVN: r126552
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@ -1,3 +1,8 @@
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2007-07-11 Nick Clifton <nickc@redhat.com>
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* config/m32r/m32r.h (INITIALIZE_TRAMPOLINE): Revert previous
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delta and use gen_int_mode in place of GET_INT instead.
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2007-07-11 Uros Bizjak <ubizjak@gmail.com>
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2007-07-11 Uros Bizjak <ubizjak@gmail.com>
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* reg-stack.c (struct tree_opt_pass pass_stack_regs): Nullify name
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* reg-stack.c (struct tree_opt_pass pass_stack_regs): Nullify name
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@ -1006,67 +1006,35 @@ L2: .word STATIC
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/* Emit RTL insns to initialize the variable parts of a trampoline.
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/* Emit RTL insns to initialize the variable parts of a trampoline.
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FNADDR is an RTX for the address of the function's pure code.
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FNADDR is an RTX for the address of the function's pure code.
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CXT is an RTX for the static chain value for the function. */
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CXT is an RTX for the static chain value for the function. */
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#if HOST_BITS_PER_WIDE_INT > 32
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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do \
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do \
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{ \
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{ \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
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GEN_INT \
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gen_int_mode (TARGET_LITTLE_ENDIAN ? \
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(TARGET_LITTLE_ENDIAN ? 0x017e8e17 : 0x178e7e01)); \
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0x017e8e17 : 0x178e7e01, SImode)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
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GEN_INT \
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gen_int_mode (TARGET_LITTLE_ENDIAN ? \
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(TARGET_LITTLE_ENDIAN ? 0x0c00ae86 : 0xffffffff86ae000c));\
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0x0c00ae86 : 0x86ae000c, SImode)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
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GEN_INT \
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gen_int_mode (TARGET_LITTLE_ENDIAN ? \
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(TARGET_LITTLE_ENDIAN ? 0xffffffffe627871e : 0x1e8727e6));\
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0xe627871e : 0x1e8727e6, SImode)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), \
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GEN_INT \
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gen_int_mode (TARGET_LITTLE_ENDIAN ? \
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(TARGET_LITTLE_ENDIAN ? 0xffffffffc616c626 : 0x26c61fc6));\
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0xc616c626 : 0x26c61fc6, SImode)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), \
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(CXT)); \
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(CXT)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 20)), \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 20)), \
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(FNADDR)); \
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(FNADDR)); \
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if (m32r_cache_flush_trap >= 0) \
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if (m32r_cache_flush_trap >= 0) \
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emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)),\
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emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)),\
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GEN_INT (m32r_cache_flush_trap) )); \
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gen_int_mode (m32r_cache_flush_trap, SImode))); \
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else if (m32r_cache_flush_func && m32r_cache_flush_func[0]) \
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else if (m32r_cache_flush_func && m32r_cache_flush_func[0]) \
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emit_library_call (m32r_function_symbol (m32r_cache_flush_func), \
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emit_library_call (m32r_function_symbol (m32r_cache_flush_func), \
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0, VOIDmode, 3, TRAMP, Pmode, \
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0, VOIDmode, 3, TRAMP, Pmode, \
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GEN_INT (TRAMPOLINE_SIZE), SImode, \
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gen_int_mode (TRAMPOLINE_SIZE, SImode), SImode, \
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GEN_INT (3), SImode); \
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GEN_INT (3), SImode); \
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} \
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} \
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while (0)
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while (0)
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#else
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#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
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do \
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{ \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 0)), \
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GEN_INT \
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(TARGET_LITTLE_ENDIAN ? 0x017e8e17 : 0x178e7e01)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), \
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GEN_INT \
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(TARGET_LITTLE_ENDIAN ? 0x0c00ae86 : 0x86ae000c)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 8)), \
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GEN_INT \
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(TARGET_LITTLE_ENDIAN ? 0xe627871e : 0x1e8727e6)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), \
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GEN_INT \
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(TARGET_LITTLE_ENDIAN ? 0xc616c626 : 0x26c61fc6)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), \
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(CXT)); \
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emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 20)), \
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(FNADDR)); \
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if (m32r_cache_flush_trap >= 0) \
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emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)),\
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GEN_INT (m32r_cache_flush_trap) )); \
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else if (m32r_cache_flush_func && m32r_cache_flush_func[0]) \
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emit_library_call (m32r_function_symbol (m32r_cache_flush_func), \
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0, VOIDmode, 3, TRAMP, Pmode, \
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GEN_INT (TRAMPOLINE_SIZE), SImode, \
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GEN_INT (3), SImode); \
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} \
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while (0)
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#endif
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#define RETURN_ADDR_RTX(COUNT, FRAME) m32r_return_addr (COUNT)
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#define RETURN_ADDR_RTX(COUNT, FRAME) m32r_return_addr (COUNT)
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