re PR target/84899 (ICE: in final_scan_insn_1, at final.c:3139 (error: could not split insn))
PR target/84899 * postreload.c (reload_combine_recognize_pattern): Perform INTVAL addition in unsigned HOST_WIDE_INT type to avoid UB and truncate_int_for_mode the result for the destination's mode. * gcc.dg/pr84899.c: New test. From-SVN: r258610
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@ -1,5 +1,10 @@
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2018-03-16 Jakub Jelinek <jakub@redhat.com>
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PR target/84899
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* postreload.c (reload_combine_recognize_pattern): Perform
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INTVAL addition in unsigned HOST_WIDE_INT type to avoid UB and
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truncate_int_for_mode the result for the destination's mode.
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PR c/84909
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* hsa-gen.c (mem_type_for_type): Fix comment typo.
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* tree-vect-loop-manip.c (vect_create_cond_for_niters_checks):
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@ -1157,11 +1157,13 @@ reload_combine_recognize_pattern (rtx_insn *insn)
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value in PREV, the constant loading instruction. */
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validate_change (prev, &SET_DEST (prev_set), index_reg, 1);
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if (reg_state[regno].offset != const0_rtx)
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validate_change (prev,
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&SET_SRC (prev_set),
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GEN_INT (INTVAL (SET_SRC (prev_set))
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+ INTVAL (reg_state[regno].offset)),
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1);
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{
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HOST_WIDE_INT c
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= trunc_int_for_mode (UINTVAL (SET_SRC (prev_set))
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+ UINTVAL (reg_state[regno].offset),
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GET_MODE (index_reg));
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validate_change (prev, &SET_SRC (prev_set), GEN_INT (c), 1);
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}
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/* Now for every use of REG that we have recorded, replace REG
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with REG_SUM. */
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@ -1,3 +1,8 @@
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2018-03-16 Jakub Jelinek <jakub@redhat.com>
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PR target/84899
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* gcc.dg/pr84899.c: New test.
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2018-03-16 Steven G. Kargl <kargl@gcc.gnu.org>
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PR fortran/69395
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12
gcc/testsuite/gcc.dg/pr84899.c
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12
gcc/testsuite/gcc.dg/pr84899.c
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/* PR target/84899 */
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/* { dg-do compile } */
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/* { dg-options "-O -funroll-all-loops -fno-move-loop-invariants" } */
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void
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foo (int x)
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{
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int a = 1 / x, b = 0;
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while ((a + b + 1) < x)
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b = __INT_MAX__;
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}
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