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rs6000.c (rs6000_expand_vector_set): Adjust for little endian. 

gcc:

2013-11-02  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_expand_vector_set): Adjust for
	little endian.

gcc/testsuite:

2013-11-02  Bill Schmidt  <wschmidt@vnet.linux.ibm.com>

	* gcc.dg/vmx/vec-set.c: New.

From-SVN: r204321
This commit is contained in:
Bill Schmidt 2013-11-03 00:06:43 +00:00 committed by William Schmidt
parent 65e95828e5
commit 93895581f9
4 changed files with 44 additions and 4 deletions
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5
gcc/ChangeLog
View File

@ -1,3 +1,8 @@
2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com>
* config/rs6000/rs6000.c (rs6000_expand_vector_set): Adjust for
little endian.
2013-11-02 Uros Bizjak <ubizjak@gmail.com>
* config/i386/constraints.md (Ts, Tv): New address constrains.

25
gcc/config/rs6000/rs6000.c
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@ -5529,10 +5529,27 @@ rs6000_expand_vector_set (rtx target, rtx val, int elt)
XVECEXP (mask, 0, elt*width + i)
= GEN_INT (i + 0x10);
x = gen_rtx_CONST_VECTOR (V16QImode, XVEC (mask, 0));
x = gen_rtx_UNSPEC (mode,
gen_rtvec (3, target, reg,
force_reg (V16QImode, x)),
UNSPEC_VPERM);
if (BYTES_BIG_ENDIAN)
x = gen_rtx_UNSPEC (mode,
gen_rtvec (3, target, reg,
force_reg (V16QImode, x)),
UNSPEC_VPERM);
else
{
/* Invert selector. */
rtx splat = gen_rtx_VEC_DUPLICATE (V16QImode,
gen_rtx_CONST_INT (QImode, -1));
rtx tmp = gen_reg_rtx (V16QImode);
emit_move_insn (tmp, splat);
x = gen_rtx_MINUS (V16QImode, tmp, force_reg (V16QImode, x));
emit_move_insn (tmp, x);
/* Permute with operands reversed and adjusted selector. */
x = gen_rtx_UNSPEC (mode, gen_rtvec (3, reg, target, tmp),
UNSPEC_VPERM);
}
emit_insn (gen_rtx_SET (VOIDmode, target, x));
}

4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2013-11-02 Bill Schmidt <wschmidt@vnet.linux.ibm.com>
* gcc.dg/vmx/vec-set.c: New.
2013-11-02 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/29234

14
gcc/testsuite/gcc.dg/vmx/vec-set.c Normal file
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@ -0,0 +1,14 @@
#include "harness.h"
vector short
vec_set (short m)
{
return (vector short){m, 0, 0, 0, 0, 0, 0, 0};
}
static void test()
{
check (vec_all_eq (vec_set (7),
((vector short){7, 0, 0, 0, 0, 0, 0, 0})),
"vec_set");
}