passes.texi: Standardize spelling of RTL, Tree and Tree SSA.
* doc/passes.texi: Standardize spelling of RTL, Tree and Tree SSA. Remove outdated reference to flow.c and fix nits. * doc/gccint.texi: Tweak RTL description. * doc/rtl.texi: Likewise. From-SVN: r147821
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@ -1,3 +1,10 @@
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2009-05-23 Eric Botcazou <ebotcazou@adacore.com>
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* doc/passes.texi: Standardize spelling of RTL, Tree and Tree SSA.
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Remove outdated reference to flow.c and fix nits.
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* doc/gccint.texi: Tweak RTL description.
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* doc/rtl.texi: Likewise.
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2009-05-23 Denis Chertykov <chertykov@gmail.com>
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* config/avr/avr.c: Change my email address.
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@ -109,10 +109,10 @@ Additional tutorial information is linked to from
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* Options:: Option specification files.
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* Passes:: Order of passes, what they do, and what each file is for.
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* Trees:: The source representation used by the C and C++ front ends.
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* RTL:: The intermediate representation that most passes work on.
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* GENERIC:: Language-independent representation generated by Front Ends
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* GIMPLE:: Tuple representation used by Tree SSA optimizers
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* Tree SSA:: Analysis and optimization of GIMPLE
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* RTL:: Machine-dependent low-level intermediate representation.
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* Control Flow:: Maintaining and manipulating the control flow graph.
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* Loop Analysis and Representation:: Analysis and representation of loops
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* Machine Desc:: How to write machine description instruction patterns.
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@ -21,7 +21,7 @@ where near complete.
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* Parsing pass:: The language front end turns text into bits.
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* Gimplification pass:: The bits are turned into something we can optimize.
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* Pass manager:: Sequencing the optimization passes.
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* Tree-SSA passes:: Optimizations on a high-level representation.
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* Tree SSA passes:: Optimizations on a high-level representation.
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* RTL passes:: Optimizations on a low-level representation.
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@end menu
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@ -94,8 +94,8 @@ be passed to @code{rest_of_type_compilation}. Each function definition
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should be passed to @code{cgraph_finalize_function}.
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TODO: I know rest_of_compilation currently has all sorts of
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rtl-generation semantics. I plan to move all code generation
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bits (both tree and rtl) to compile_function. Should we hide
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RTL generation semantics. I plan to move all code generation
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bits (both Tree and RTL) to compile_function. Should we hide
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cgraph from the front ends and move back to rest_of_compilation
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as the official interface? Possibly we should rename all three
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interfaces such that the names match in some meaningful way and
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@ -172,12 +172,12 @@ dump anything.
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TODO: describe the global variables set up by the pass manager,
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and a brief description of how a new pass should use it.
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I need to look at what info rtl passes use first@enddots{}
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I need to look at what info RTL passes use first@enddots{}
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@node Tree-SSA passes
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@section Tree-SSA passes
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@node Tree SSA passes
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@section Tree SSA passes
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The following briefly describes the tree optimization passes that are
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The following briefly describes the Tree optimization passes that are
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run after gimplification and what source files they are located in.
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@itemize @bullet
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@ -401,7 +401,7 @@ and described by @code{pass_loop}.
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The optimizations performed by this pass are:
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Loop invariant motion. This pass moves only invariants that
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would be hard to handle on rtl level (function calls, operations that expand to
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would be hard to handle on RTL level (function calls, operations that expand to
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nontrivial sequences of insns). With @option{-funswitch-loops} it also moves
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operands of conditions that are invariant out of the loop, so that we can use
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just trivial invariantness analysis in loop unswitching. The pass also includes
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@ -422,8 +422,8 @@ Loop unswitching. This pass moves the conditional jumps that are invariant
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out of the loops. To achieve this, a duplicate of the loop is created for
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each possible outcome of conditional jump(s). The pass is implemented in
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@file{tree-ssa-loop-unswitch.c}. This pass should eventually replace the
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rtl-level loop unswitching in @file{loop-unswitch.c}, but currently
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the rtl-level pass is not completely redundant yet due to deficiencies
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RTL level loop unswitching in @file{loop-unswitch.c}, but currently
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the RTL level pass is not completely redundant yet due to deficiencies
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in tree level alias analysis.
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The optimizations also use various utility functions contained in
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@ -651,8 +651,8 @@ registers don't need to be saved. This pass is located in
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@node RTL passes
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@section RTL passes
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The following briefly describes the rtl generation and optimization
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passes that are run after tree optimization.
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The following briefly describes the RTL generation and optimization
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passes that are run after the Tree optimization passes.
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@itemize @bullet
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@item RTL generation
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@ -679,15 +679,15 @@ generated from the machine description by the programs @code{genflags}
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and @code{gencodes}, tell this pass which standard names are available
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for use and which patterns correspond to them.
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@item Generate exception handling landing pads
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@item Generation of exception landing pads
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This pass generates the glue that handles communication between the
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exception handling library routines and the exception handlers within
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the function. Entry points in the function that are invoked by the
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exception handling library are called @dfn{landing pads}. The code
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for this pass is located within @file{except.c}.
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for this pass is located in @file{except.c}.
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@item Cleanup control flow graph
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@item Control flow graph cleanup
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This pass removes unreachable code, simplifies jumps to next, jumps to
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jump, jumps across jumps, etc. The pass is run multiple times.
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@ -702,16 +702,16 @@ This pass attempts to remove redundant computation by substituting
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variables that come from a single definition, and
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seeing if the result can be simplified. It performs copy propagation
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and addressing mode selection. The pass is run twice, with values
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being propagated into loops only on the second run. It is located in
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@file{fwprop.c}.
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being propagated into loops only on the second run. The code is
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located in @file{fwprop.c}.
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@item Common subexpression elimination
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This pass removes redundant computation within basic blocks, and
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optimizes addressing modes based on cost. The pass is run twice.
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The source is located in @file{cse.c}.
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The code for this pass is located in @file{cse.c}.
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@item Global common subexpression elimination.
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@item Global common subexpression elimination
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This pass performs two
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different types of GCSE depending on whether you are optimizing for
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@ -755,22 +755,13 @@ This pass attempts to replace conditional branches and surrounding
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assignments with arithmetic, boolean value producing comparison
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instructions, and conditional move instructions. In the very last
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invocation after reload, it will generate predicated instructions
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when supported by the target. The pass is located in @file{ifcvt.c}.
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when supported by the target. The code is located in @file{ifcvt.c}.
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@item Web construction
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This pass splits independent uses of each pseudo-register. This can
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improve effect of the other transformation, such as CSE or register
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allocation. Its source files are @file{web.c}.
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@item Life analysis
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This pass computes which pseudo-registers are live at each point in
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the program, and makes the first instruction that uses a value point
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at the instruction that computed the value. It then deletes
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computations whose results are never used, and combines memory
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references with add or subtract instructions to make autoincrement or
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autodecrement addressing. The pass is located in @file{flow.c}.
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allocation. The code for this pass is located in @file{web.c}.
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@item Instruction combination
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@ -778,23 +769,23 @@ This pass attempts to combine groups of two or three instructions that
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are related by data flow into single instructions. It combines the
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RTL expressions for the instructions by substitution, simplifies the
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result using algebra, and then attempts to match the result against
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the machine description. The pass is located in @file{combine.c}.
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the machine description. The code is located in @file{combine.c}.
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@item Register movement
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This pass looks for cases where matching constraints would force an
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instruction to need a reload, and this reload would be a
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register-to-register move. It then attempts to change the registers
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used by the instruction to avoid the move instruction.
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The pass is located in @file{regmove.c}.
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used by the instruction to avoid the move instruction. The code is
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located in @file{regmove.c}.
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@item Optimize mode switching
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@item Mode switching optimization
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This pass looks for instructions that require the processor to be in a
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specific ``mode'' and minimizes the number of mode changes required to
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satisfy all users. What these modes are, and what they apply to are
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completely target-specific.
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The source is located in @file{mode-switching.c}.
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completely target-specific. The code for this pass is located in
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@file{mode-switching.c}.
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@cindex modulo scheduling
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@cindex sms, swing, software pipelining
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@ -802,8 +793,8 @@ The source is located in @file{mode-switching.c}.
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This pass looks at innermost loops and reorders their instructions
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by overlapping different iterations. Modulo scheduling is performed
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immediately before instruction scheduling.
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The pass is located in (@file{modulo-sched.c}).
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immediately before instruction scheduling. The code for this pass is
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located in @file{modulo-sched.c}.
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@item Instruction scheduling
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@ -813,7 +804,7 @@ floating point instructions often have this behavior on RISC machines.
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It re-orders instructions within a basic block to try to separate the
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definition and use of items that otherwise would cause pipeline
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stalls. This pass is performed twice, before and after register
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allocation. The pass is located in @file{haifa-sched.c},
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allocation. The code for this pass is located in @file{haifa-sched.c},
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@file{sched-deps.c}, @file{sched-ebb.c}, @file{sched-rgn.c} and
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@file{sched-vis.c}.
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@ -884,13 +875,13 @@ This pass computes where the variables are stored at each
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position in code and generates notes describing the variable locations
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to RTL code. The location lists are then generated according to these
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notes to debug information if the debugging information format supports
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location lists.
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location lists. The code is located in @file{var-tracking.c}.
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@item Delayed branch scheduling
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This optional pass attempts to find instructions that can go into the
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delay slots of other instructions, usually jumps and calls. The
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source file name is @file{reorg.c}.
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delay slots of other instructions, usually jumps and calls. The code
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for this pass is located in @file{reorg.c}.
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@item Branch shortening
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@ -899,13 +890,14 @@ Thus, longer sequences of instructions must be used for long branches.
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In this pass, the compiler figures out what how far each instruction
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will be from each other instruction, and therefore whether the usual
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instructions, or the longer sequences, must be used for each branch.
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The code for this pass is located in @file{final.c}.
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@item Register-to-stack conversion
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Conversion from usage of some hard registers to usage of a register
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stack may be done at this point. Currently, this is supported only
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for the floating-point registers of the Intel 80387 coprocessor. The
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source file name is @file{reg-stack.c}.
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for the floating-point registers of the Intel 80387 coprocessor. The
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code for this pass is located in @file{reg-stack.c}.
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@item Final
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@cindex representation of RTL
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@cindex Register Transfer Language (RTL)
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Most of the work of the compiler is done on an intermediate representation
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called register transfer language. In this language, the instructions to be
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output are described, pretty much one by one, in an algebraic form that
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describes what the instruction does.
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The last part of the compiler work is done on a low-level intermediate
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representation called Register Transfer Language. In this language, the
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instructions to be output are described, pretty much one by one, in an
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algebraic form that describes what the instruction does.
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RTL is inspired by Lisp lists. It has both an internal form, made up of
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structures that point at other structures, and a textual form that is used
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