OpenE2K
/
gcc
2
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

re PR target/36557 (-m32 -mpowerpc64 produces better code than -m64 for a!=0) 

PR target/36557
	* config/rs6000/rs6000.md (*eqsi3_ext<mode>, *nesi3_ext<mode>): New.

From-SVN: r219336
This commit is contained in:
Segher Boessenkool 2015-01-08 04:46:41 +01:00 committed by Segher Boessenkool
parent 317991c964
commit 946695b779
2 changed files with 65 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
gcc/ChangeLog
View File

@ -1,3 +1,8 @@
2015-01-07 Segher Boessenkool <segher@kernel.crashing.org>
PR target/36557
* config/rs6000/rs6000.md (*eqsi3_ext<mode>, *nesi3_ext<mode>): New.
2015-01-07 Sandra Loosemore <sandra@codesourcery.com>
* doc/invoke.texi ([-fvtable-verify]): Fix markup on option

60
gcc/config/rs6000/rs6000.md
View File

@ -12576,6 +12576,66 @@
(if_then_else (match_test "operands[2] == const0_rtx")
(const_string "8")
(const_string "12")))])
(define_insn_and_split "*eqsi3_ext<mode>"
[(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r")
(eq:EXTSI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "scc_eq_operand" "rKLI")))
(clobber (match_scratch:SI 3 "=r"))
(clobber (match_scratch:SI 4 "=r"))]
""
"#"
""
[(set (match_dup 4)
(clz:SI (match_dup 3)))
(set (match_dup 0)
(zero_extend:EXTSI
(lshiftrt:SI (match_dup 4)
(const_int 5))))]
{
operands[3] = rs6000_emit_eqne (SImode,
operands[1], operands[2], operands[3]);
if (GET_CODE (operands[4]) == SCRATCH)
operands[4] = gen_reg_rtx (SImode);
}
[(set (attr "length")
(if_then_else (match_test "operands[2] == const0_rtx")
(const_string "8")
(const_string "12")))])
(define_insn_and_split "*nesi3_ext<mode>"
[(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r")
(ne:EXTSI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "scc_eq_operand" "rKLI")))
(clobber (match_scratch:SI 3 "=r"))
(clobber (match_scratch:SI 4 "=r"))
(clobber (match_scratch:EXTSI 5 "=r"))]
""
"#"
""
[(set (match_dup 4)
(clz:SI (match_dup 3)))
(set (match_dup 5)
(zero_extend:EXTSI
(lshiftrt:SI (match_dup 4)
(const_int 5))))
(set (match_dup 0)
(xor:EXTSI (match_dup 5)
(const_int 1)))]
{
operands[3] = rs6000_emit_eqne (SImode,
operands[1], operands[2], operands[3]);
if (GET_CODE (operands[4]) == SCRATCH)
operands[4] = gen_reg_rtx (SImode);
if (GET_CODE (operands[5]) == SCRATCH)
operands[5] = gen_reg_rtx (<MODE>mode);
}
[(set (attr "length")
(if_then_else (match_test "operands[2] == const0_rtx")
(const_string "12")
(const_string "16")))])
;; Define both directions of branch and return. If we need a reload
;; register, we'd rather use CR0 since it is much easier to copy a