testsuite: aarch64: Add tests for narrowing-arithmetic intrinsics

Add tests for v[r]addhn_high and v[r]subhn_high Neon intrinsics.
Since these intrinsics are only supported for AArch64, these tests
are restricted to only run on AArch64 targets.

gcc/testsuite/ChangeLog:

2021-03-02  Jonathan Wright  <jonathan.wright@arm.com>

	* gcc.target/aarch64/advsimd-intrinsics/vXXXhn_high.inc:
	New test template.
	* gcc.target/aarch64/advsimd-intrinsics/vaddhn_high.c:
	New test.
	* gcc.target/aarch64/advsimd-intrinsics/vraddhn_high.c:
	New test.
	* gcc.target/aarch64/advsimd-intrinsics/vrsubhn_high.c:
	New test.
	* gcc.target/aarch64/advsimd-intrinsics/vsubhn_high.c:
	New test.
This commit is contained in:
Jonathan Wright 2021-03-02 11:57:31 +00:00
parent 0b8fa12015
commit 949eab55b6
5 changed files with 193 additions and 0 deletions

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#define FNNAME1(NAME) exec_ ## NAME
#define FNNAME(NAME) FNNAME1(NAME)
void FNNAME (INSN_NAME) (void)
{
/* Basic test: v128_r=vXXXhn_high(v64_r, v128_a, v128_b), store result. */
#define TEST_VXXXHN_HIGH1(INSN, T1, T2, W1, W2, N1, N2) \
VECT_VAR(v128_r, T1, W2, N2) = INSN##_##T2##W1(VECT_VAR(v64_r, T1, W2, N1), \
VECT_VAR(v128_a, T1, W1, N1), \
VECT_VAR(v128_b, T1, W1, N1)); \
vst1q_##T2##W2(VECT_VAR(result, T1, W2, N2), VECT_VAR(v128_r, T1, W2, N2))
#define TEST_VXXXHN_HIGH(INSN, T1, T2, W1, W2, N1, N2) \
TEST_VXXXHN_HIGH1(INSN, T1, T2, W1, W2, N1, N2)
DECL_VARIABLE_128BITS_VARIANTS(v128_r);
DECL_VARIABLE_64BITS_VARIANTS(v64_r);
DECL_VARIABLE_128BITS_VARIANTS(v128_a);
DECL_VARIABLE_128BITS_VARIANTS(v128_b);
clean_results ();
/* Fill v64_r with a value easy to recognise in the result vector. */
VDUP(v64_r, , int, s, 8, 8, 0x5);
VDUP(v64_r, , int, s, 16, 4, 0x5);
VDUP(v64_r, , int, s, 32, 2, 0x5);
VDUP(v64_r, , uint, u, 8, 8, 0x5);
VDUP(v64_r, , uint, u, 16, 4, 0x5);
VDUP(v64_r, , uint, u, 32, 2, 0x5);
/* Fill input v128_a and v128_b with arbitrary values. */
VDUP(v128_a, q, int, s, 16, 8, 50*(UINT8_MAX+1));
VDUP(v128_a, q, int, s, 32, 4, 50*(UINT16_MAX+1));
VDUP(v128_a, q, int, s, 64, 2, 24*((uint64_t)UINT32_MAX+1));
VDUP(v128_a, q, uint, u, 16, 8, 3*(UINT8_MAX+1));
VDUP(v128_a, q, uint, u, 32, 4, 55*(UINT16_MAX+1));
VDUP(v128_a, q, uint, u, 64, 2, 3*((uint64_t)UINT32_MAX+1));
VDUP(v128_b, q, int, s, 16, 8, (uint16_t)UINT8_MAX);
VDUP(v128_b, q, int, s, 32, 4, (uint32_t)UINT16_MAX);
VDUP(v128_b, q, int, s, 64, 2, (uint64_t)UINT32_MAX);
VDUP(v128_b, q, uint, u, 16, 8, (uint16_t)UINT8_MAX);
VDUP(v128_b, q, uint, u, 32, 4, (uint32_t)UINT16_MAX);
VDUP(v128_b, q, uint, u, 64, 2, (uint64_t)UINT32_MAX);
TEST_VXXXHN_HIGH(INSN_NAME, int, s, 16, 8, 8, 16);
TEST_VXXXHN_HIGH(INSN_NAME, int, s, 32, 16, 4, 8);
TEST_VXXXHN_HIGH(INSN_NAME, int, s, 64, 32, 2, 4);
TEST_VXXXHN_HIGH(INSN_NAME, uint, u, 16, 8, 8, 16);
TEST_VXXXHN_HIGH(INSN_NAME, uint, u, 32, 16, 4, 8);
TEST_VXXXHN_HIGH(INSN_NAME, uint, u, 64, 32, 2, 4);
CHECK(TEST_MSG, int, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, int, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, int, 32, 4, PRIx32, expected, "");
CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected, "");
CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected, "");
CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected, "");
}
int main (void)
{
FNNAME (INSN_NAME) ();
return 0;
}

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/* { dg-skip-if "" { arm*-*-* } } */
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#if defined(__cplusplus)
#include <cstdint>
#else
#include <stdint.h>
#endif
#define INSN_NAME vaddhn_high
#define TEST_MSG "VADDHN_HIGH"
/* Expected results. */
VECT_VAR_DECL(expected, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x32, 0x32, 0x32, 0x32,
0x32, 0x32, 0x32, 0x32 };
VECT_VAR_DECL(expected, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x32, 0x32, 0x32, 0x32 };
VECT_VAR_DECL(expected, int, 32, 4) [] = { 0x5, 0x5, 0x18, 0x18 };
VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x3, 0x3, 0x3, 0x3,
0x3, 0x3, 0x3, 0x3 };
VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x37, 0x37, 0x37, 0x37 };
VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0x3, 0x3 };
#include "vXXXhn_high.inc"

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/* { dg-skip-if "" { arm*-*-* } } */
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#if defined(__cplusplus)
#include <cstdint>
#else
#include <stdint.h>
#endif
#define INSN_NAME vraddhn_high
#define TEST_MSG "VRADDHN_HIGH"
/* Expected results. */
VECT_VAR_DECL(expected, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x33, 0x33, 0x33, 0x33,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x33, 0x33, 0x33, 0x33 };
VECT_VAR_DECL(expected, int, 32, 4) [] = { 0x5, 0x5, 0x19, 0x19 };
VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x4, 0x4, 0x4, 0x4,
0x4, 0x4, 0x4, 0x4 };
VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x38, 0x38, 0x38, 0x38 };
VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0x4, 0x4 };
#include "vXXXhn_high.inc"

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/* { dg-skip-if "" { arm*-*-* } } */
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#if defined(__cplusplus)
#include <cstdint>
#else
#include <stdint.h>
#endif
#define INSN_NAME vrsubhn_high
#define TEST_MSG "VRSUBHN_HIGH"
/* Expected results. */
VECT_VAR_DECL(expected, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x31, 0x31, 0x31, 0x31,
0x31, 0x31, 0x31, 0x31 };
VECT_VAR_DECL(expected, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x31, 0x31, 0x31, 0x31 };
VECT_VAR_DECL(expected, int, 32, 4) [] = { 0x5, 0x5, 0x17, 0x17 };
VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x2, 0x2, 0x2, 0x2,
0x2, 0x2, 0x2, 0x2 };
VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x36, 0x36, 0x36, 0x36 };
VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0x2, 0x2 };
#include "vXXXhn_high.inc"

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/* { dg-skip-if "" { arm*-*-* } } */
#include <arm_neon.h>
#include "arm-neon-ref.h"
#include "compute-ref-data.h"
#if defined(__cplusplus)
#include <cstdint>
#else
#include <stdint.h>
#endif
#define INSN_NAME vsubhn_high
#define TEST_MSG "VSUBHN_HIGH"
/* Expected results. */
VECT_VAR_DECL(expected, int, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x31, 0x31, 0x31, 0x31,
0x31, 0x31, 0x31, 0x31 };
VECT_VAR_DECL(expected, int, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x31, 0x31, 0x31, 0x31 };
VECT_VAR_DECL(expected, int, 32, 4) [] = { 0x5, 0x5, 0x17, 0x17 };
VECT_VAR_DECL(expected, uint, 8, 16) [] = { 0x5, 0x5, 0x5, 0x5,
0x5, 0x5, 0x5, 0x5,
0x2, 0x2, 0x2, 0x2,
0x2, 0x2, 0x2, 0x2 };
VECT_VAR_DECL(expected, uint, 16, 8) [] = { 0x5, 0x5, 0x5, 0x5,
0x36, 0x36, 0x36, 0x36 };
VECT_VAR_DECL(expected, uint, 32, 4) [] = { 0x5, 0x5, 0x2, 0x2 };
#include "vXXXhn_high.inc"