re PR target/50457 (SH2A atomic functions)
PR target/50457 * config/sh/sh.c (parse_validate_atomic_model_option): Handle name strings in sh_atomic_model. * config/sh/sh.h (TARGET_CPU_CPP_BUILTINS): Move macro implementation to ... * config/sh/sh-c.c (sh_cpu_cpp_builtins): ... this new function. Add __SH1__ and __SH2__ defines. Add __SH_ATOMIC_MODEL_*__ define. * config/sh/sh-protos.h (sh_atomic_model): Add name and cdef_name variables. (sh_cpu_cpp_builtins): Declare new function. PR target/50457 * config/sh/linux-atomic.S: Delete. * config/sh/linux-atomic.c: New. * config/sh/t-linux (LIB2ADD): Replace linux-atomic.S with linux-atomic.c. Add cflags to disable warnings. From-SVN: r192051
This commit is contained in:
Oleg Endo
parent
846b158cd9
commit
9597375a25
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@ -1,3 +1,16 @@
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2012-10-03 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/50457
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* config/sh/sh.c (parse_validate_atomic_model_option): Handle name
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strings in sh_atomic_model.
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* config/sh/sh.h (TARGET_CPU_CPP_BUILTINS): Move macro implementation
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to ...
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* config/sh/sh-c.c (sh_cpu_cpp_builtins): ... this new function.
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Add __SH1__ and __SH2__ defines. Add __SH_ATOMIC_MODEL_*__ define.
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* config/sh/sh-protos.h (sh_atomic_model): Add name and cdef_name
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variables.
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(sh_cpu_cpp_builtins): Declare new function.
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2012-10-03 Dehao Chen <dehao@google.com>
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PR middle-end/54782
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@ -25,6 +25,9 @@ along with GCC; see the file COPYING3. If not see
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#include "tm.h"
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#include "tree.h"
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#include "tm_p.h"
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#include "cpplib.h"
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#include "c-family/c-common.h"
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#include "target.h"
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/* Handle machine specific pragmas to be semi-compatible with Renesas
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compiler. */
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@ -66,3 +69,79 @@ sh_pr_nosave_low_regs (struct cpp_reader *pfile ATTRIBUTE_UNUSED)
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{
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sh_add_function_attribute ("nosave_low_regs");
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}
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#define builtin_define(TXT) cpp_define (pfile, TXT)
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#define builtin_assert(TXT) cpp_assert (pfile, TXT)
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/* Implement the TARGET_CPU_CPP_BUILTINS macro */
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void
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sh_cpu_cpp_builtins (cpp_reader* pfile)
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{
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builtin_define ("__sh__");
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builtin_assert ("cpu=sh");
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builtin_assert ("machine=sh");
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switch ((int) sh_cpu)
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{
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case PROCESSOR_SH1:
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builtin_define ("__sh1__");
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builtin_define ("__SH1__");
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break;
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case PROCESSOR_SH2:
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builtin_define ("__sh2__");
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builtin_define ("__SH2__");
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break;
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case PROCESSOR_SH2E:
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builtin_define ("__SH2E__");
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break;
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case PROCESSOR_SH2A:
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builtin_define ("__SH2A__");
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if (TARGET_SH2A_DOUBLE)
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builtin_define (TARGET_FPU_SINGLE
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? "__SH2A_SINGLE__" : "__SH2A_DOUBLE__");
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else
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builtin_define (TARGET_FPU_ANY
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? "__SH2A_SINGLE_ONLY__" : "__SH2A_NOFPU__");
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break;
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case PROCESSOR_SH3:
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builtin_define ("__sh3__");
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builtin_define ("__SH3__");
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if (TARGET_HARD_SH4)
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builtin_define ("__SH4_NOFPU__");
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break;
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case PROCESSOR_SH3E:
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builtin_define (TARGET_HARD_SH4 ? "__SH4_SINGLE_ONLY__" : "__SH3E__");
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break;
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case PROCESSOR_SH4:
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builtin_define (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__");
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break;
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case PROCESSOR_SH4A: \
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builtin_define ("__SH4A__");
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builtin_define (TARGET_SH4
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? (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__")
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: TARGET_FPU_ANY ? "__SH4_SINGLE_ONLY__"
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: "__SH4_NOFPU__");
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break;
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case PROCESSOR_SH5:
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{
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builtin_define_with_value ("__SH5__",
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TARGET_SHMEDIA64 ? "64" : "32", 0);
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builtin_define_with_value ("__SHMEDIA__",
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TARGET_SHMEDIA ? "1" : "0", 0);
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if (! TARGET_FPU_DOUBLE)
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builtin_define ("__SH4_NOFPU__");
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}
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}
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if (TARGET_FPU_ANY)
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builtin_define ("__SH_FPU_ANY__");
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if (TARGET_FPU_DOUBLE)
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builtin_define ("__SH_FPU_DOUBLE__");
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if (TARGET_HITACHI)
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builtin_define ("__HITACHI__");
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if (TARGET_FMOVD)
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builtin_define ("__FMOVD_ENABLED__");
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builtin_define (TARGET_LITTLE_ENDIAN
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? "__LITTLE_ENDIAN__" : "__BIG_ENDIAN__");
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cpp_define_formatted (pfile, "__SH_ATOMIC_MODEL_%s__",
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selected_atomic_model ().cdef_name);
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}
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@ -55,6 +55,14 @@ struct sh_atomic_model
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happen on SH4A. */
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bool strict;
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enum_type type;
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/* Name string as it was specified on the command line. */
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const char* name;
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/* Name string as it is used in C/C++ defines. */
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const char* cdef_name;
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/* GBR offset variable for TCB model. */
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int tcb_gbr_offset;
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};
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@ -156,6 +164,8 @@ extern void sh_canonicalize_comparison (enum rtx_code&, rtx&, rtx&,
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#endif /* RTX_CODE */
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extern void sh_cpu_cpp_builtins (cpp_reader* pfile);
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extern const char *output_jump_label_table (void);
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extern rtx get_t_reg_rtx (void);
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extern rtx get_fpscr_rtx (void);
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@ -619,8 +619,17 @@ parse_validate_atomic_model_option (const char* str)
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model_names[sh_atomic_model::soft_tcb] = "soft-tcb";
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model_names[sh_atomic_model::soft_imask] = "soft-imask";
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const char* model_cdef_names[sh_atomic_model::num_models];
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model_cdef_names[sh_atomic_model::none] = "NONE";
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model_cdef_names[sh_atomic_model::soft_gusa] = "SOFT_GUSA";
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model_cdef_names[sh_atomic_model::hard_llcs] = "HARD_LLCS";
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model_cdef_names[sh_atomic_model::soft_tcb] = "SOFT_TCB";
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model_cdef_names[sh_atomic_model::soft_imask] = "SOFT_IMASK";
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sh_atomic_model ret;
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ret.type = sh_atomic_model::none;
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ret.name = model_names[sh_atomic_model::none];
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ret.cdef_name = model_cdef_names[sh_atomic_model::none];
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ret.strict = false;
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ret.tcb_gbr_offset = -1;
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@ -646,6 +655,8 @@ parse_validate_atomic_model_option (const char* str)
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if (tokens.front () == model_names[i])
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{
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ret.type = (sh_atomic_model::enum_type)i;
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ret.name = model_names[i];
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ret.cdef_name = model_cdef_names[i];
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goto got_mode_name;
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}
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@ -677,25 +688,23 @@ got_mode_name:;
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if (ret.type == sh_atomic_model::soft_gusa && !TARGET_SH3)
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err_ret ("atomic model %s is only available on SH3 and SH4 targets",
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model_names[ret.type]);
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ret.name);
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if (ret.type == sh_atomic_model::hard_llcs && !TARGET_SH4A)
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err_ret ("atomic model %s is only available on SH4A targets",
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model_names[ret.type]);
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err_ret ("atomic model %s is only available on SH4A targets", ret.name);
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if (ret.type == sh_atomic_model::soft_tcb && ret.tcb_gbr_offset == -1)
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err_ret ("atomic model %s requires gbr-offset parameter",
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model_names[ret.type]);
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err_ret ("atomic model %s requires gbr-offset parameter", ret.name);
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if (ret.type == sh_atomic_model::soft_tcb
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&& (ret.tcb_gbr_offset < 0 || ret.tcb_gbr_offset > 1020
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|| (ret.tcb_gbr_offset & 3) != 0))
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err_ret ("invalid gbr-offset value \"%d\" for atomic model %s; it must be "
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"a multiple of 4 in the range 0-1020", ret.tcb_gbr_offset,
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model_names[ret.type]);
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ret.name);
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if (ret.type == sh_atomic_model::soft_imask && TARGET_USERMODE)
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err_ret ("cannot use atomic model %s in user mode", model_names[ret.type]);
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err_ret ("cannot use atomic model %s in user mode", ret.name);
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return ret;
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@ -31,69 +31,7 @@ along with GCC; see the file COPYING3. If not see
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/* ??? No longer true. */
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extern int code_for_indirect_jump_scratch;
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#define TARGET_CPU_CPP_BUILTINS() \
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do { \
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builtin_define ("__sh__"); \
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builtin_assert ("cpu=sh"); \
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builtin_assert ("machine=sh"); \
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switch ((int) sh_cpu) \
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{ \
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case PROCESSOR_SH1: \
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builtin_define ("__sh1__"); \
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break; \
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case PROCESSOR_SH2: \
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builtin_define ("__sh2__"); \
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break; \
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case PROCESSOR_SH2E: \
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builtin_define ("__SH2E__"); \
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break; \
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case PROCESSOR_SH2A: \
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builtin_define ("__SH2A__"); \
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builtin_define (TARGET_SH2A_DOUBLE \
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? (TARGET_FPU_SINGLE ? "__SH2A_SINGLE__" : "__SH2A_DOUBLE__") \
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: TARGET_FPU_ANY ? "__SH2A_SINGLE_ONLY__" \
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: "__SH2A_NOFPU__"); \
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break; \
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case PROCESSOR_SH3: \
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builtin_define ("__sh3__"); \
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builtin_define ("__SH3__"); \
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if (TARGET_HARD_SH4) \
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builtin_define ("__SH4_NOFPU__"); \
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break; \
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case PROCESSOR_SH3E: \
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builtin_define (TARGET_HARD_SH4 ? "__SH4_SINGLE_ONLY__" : "__SH3E__"); \
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break; \
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case PROCESSOR_SH4: \
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builtin_define (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__"); \
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break; \
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case PROCESSOR_SH4A: \
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builtin_define ("__SH4A__"); \
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builtin_define (TARGET_SH4 \
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? (TARGET_FPU_SINGLE ? "__SH4_SINGLE__" : "__SH4__") \
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: TARGET_FPU_ANY ? "__SH4_SINGLE_ONLY__" \
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: "__SH4_NOFPU__"); \
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break; \
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case PROCESSOR_SH5: \
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{ \
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builtin_define_with_value ("__SH5__", \
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TARGET_SHMEDIA64 ? "64" : "32", 0); \
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builtin_define_with_value ("__SHMEDIA__", \
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TARGET_SHMEDIA ? "1" : "0", 0); \
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if (! TARGET_FPU_DOUBLE) \
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builtin_define ("__SH4_NOFPU__"); \
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} \
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} \
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if (TARGET_FPU_ANY) \
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builtin_define ("__SH_FPU_ANY__"); \
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if (TARGET_FPU_DOUBLE) \
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builtin_define ("__SH_FPU_DOUBLE__"); \
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if (TARGET_HITACHI) \
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builtin_define ("__HITACHI__"); \
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if (TARGET_FMOVD) \
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builtin_define ("__FMOVD_ENABLED__"); \
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builtin_define (TARGET_LITTLE_ENDIAN \
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? "__LITTLE_ENDIAN__" : "__BIG_ENDIAN__"); \
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} while (0)
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#define TARGET_CPU_CPP_BUILTINS() sh_cpu_cpp_builtins (pfile)
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/* Value should be nonzero if functions must have frame pointers.
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Zero means the frame pointer need not be set up (and parms may be accessed
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@ -1,3 +1,11 @@
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2012-10-03 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/50457
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* config/sh/linux-atomic.S: Delete.
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* config/sh/linux-atomic.c: New.
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* config/sh/t-linux (LIB2ADD): Replace linux-atomic.S with
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linux-atomic.c. Add cflags to disable warnings.
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2012-10-02 Jonathan Wakely <jwakely.gcc@gmail.com>
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PR other/53889
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@ -16,8 +24,8 @@
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2012-09-19 Mark Kettenis <kettenis@openbsd.org>
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* config.host (hppa-*-openbsd*): New target.
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* config/pa/t-openbsd: New file.
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* config.host (hppa-*-openbsd*): New target.
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* config/pa/t-openbsd: New file.
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2012-09-15 Georg-Johann Lay <avr@gjlay.de>
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@ -50,9 +58,9 @@
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2012-09-07 Teresa Johnson <tejohnson@google.com>
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PR gcov-profile/54487
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PR gcov-profile/54487
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* libgcc/libgcov.c (gcov_exit): Avoid warning on histogram
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differences.
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differences.
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2012-09-05 Georg-Johann Lay <avr@gjlay.de>
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@ -1,223 +0,0 @@
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/* Copyright (C) 2006, 2008, 2009 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GCC is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
|
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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!! Linux specific atomic routines for the Renesas / SuperH SH CPUs.
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!! Linux kernel for SH3/4 has implemented the support for software
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!! atomic sequences.
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#define FUNC(X) .type X,@function
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#define HIDDEN_FUNC(X) FUNC(X); .hidden X
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#define ENDFUNC0(X) .Lfe_##X: .size X,.Lfe_##X-X
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#define ENDFUNC(X) ENDFUNC0(X)
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#if ! __SH5__
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#define ATOMIC_TEST_AND_SET(N,T,EXT) \
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.global __sync_lock_test_and_set_##N; \
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HIDDEN_FUNC(__sync_lock_test_and_set_##N); \
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.align 2; \
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__sync_lock_test_and_set_##N:; \
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mova 1f, r0; \
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nop; \
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mov r15, r1; \
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mov #(0f-1f), r15; \
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0: mov.##T @r4, r2; \
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mov.##T r5, @r4; \
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1: mov r1, r15; \
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rts; \
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EXT r2, r0; \
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ENDFUNC(__sync_lock_test_and_set_##N)
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ATOMIC_TEST_AND_SET (1,b,extu.b)
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ATOMIC_TEST_AND_SET (2,w,extu.w)
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ATOMIC_TEST_AND_SET (4,l,mov)
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#define ATOMIC_COMPARE_AND_SWAP(N,T,EXTS,EXT) \
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.global __sync_val_compare_and_swap_##N; \
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HIDDEN_FUNC(__sync_val_compare_and_swap_##N); \
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.align 2; \
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__sync_val_compare_and_swap_##N:; \
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mova 1f, r0; \
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EXTS r5, r5; \
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mov r15, r1; \
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mov #(0f-1f), r15; \
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0: mov.##T @r4, r2; \
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cmp/eq r2, r5; \
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bf 1f; \
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mov.##T r6, @r4; \
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1: mov r1, r15; \
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rts; \
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EXT r2, r0; \
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ENDFUNC(__sync_val_compare_and_swap_##N)
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ATOMIC_COMPARE_AND_SWAP (1,b,exts.b,extu.b)
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ATOMIC_COMPARE_AND_SWAP (2,w,exts.w,extu.w)
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ATOMIC_COMPARE_AND_SWAP (4,l,mov,mov)
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#define ATOMIC_BOOL_COMPARE_AND_SWAP(N,T,EXTS) \
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.global __sync_bool_compare_and_swap_##N; \
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HIDDEN_FUNC(__sync_bool_compare_and_swap_##N); \
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.align 2; \
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__sync_bool_compare_and_swap_##N:; \
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mova 1f, r0; \
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EXTS r5, r5; \
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mov r15, r1; \
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mov #(0f-1f), r15; \
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0: mov.##T @r4, r2; \
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cmp/eq r2, r5; \
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bf 1f; \
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mov.##T r6, @r4; \
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1: mov r1, r15; \
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rts; \
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movt r0; \
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ENDFUNC(__sync_bool_compare_and_swap_##N)
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ATOMIC_BOOL_COMPARE_AND_SWAP (1,b,exts.b)
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ATOMIC_BOOL_COMPARE_AND_SWAP (2,w,exts.w)
|
||||
ATOMIC_BOOL_COMPARE_AND_SWAP (4,l,mov)
|
||||
|
||||
#define ATOMIC_FETCH_AND_OP(OP,N,T,EXT) \
|
||||
.global __sync_fetch_and_##OP##_##N; \
|
||||
HIDDEN_FUNC(__sync_fetch_and_##OP##_##N); \
|
||||
.align 2; \
|
||||
__sync_fetch_and_##OP##_##N:; \
|
||||
mova 1f, r0; \
|
||||
nop; \
|
||||
mov r15, r1; \
|
||||
mov #(0f-1f), r15; \
|
||||
0: mov.##T @r4, r2; \
|
||||
mov r5, r3; \
|
||||
OP r2, r3; \
|
||||
mov.##T r3, @r4; \
|
||||
1: mov r1, r15; \
|
||||
rts; \
|
||||
EXT r2, r0; \
|
||||
ENDFUNC(__sync_fetch_and_##OP##_##N)
|
||||
|
||||
ATOMIC_FETCH_AND_OP(add,1,b,extu.b)
|
||||
ATOMIC_FETCH_AND_OP(add,2,w,extu.w)
|
||||
ATOMIC_FETCH_AND_OP(add,4,l,mov)
|
||||
|
||||
ATOMIC_FETCH_AND_OP(or,1,b,extu.b)
|
||||
ATOMIC_FETCH_AND_OP(or,2,w,extu.w)
|
||||
ATOMIC_FETCH_AND_OP(or,4,l,mov)
|
||||
|
||||
ATOMIC_FETCH_AND_OP(and,1,b,extu.b)
|
||||
ATOMIC_FETCH_AND_OP(and,2,w,extu.w)
|
||||
ATOMIC_FETCH_AND_OP(and,4,l,mov)
|
||||
|
||||
ATOMIC_FETCH_AND_OP(xor,1,b,extu.b)
|
||||
ATOMIC_FETCH_AND_OP(xor,2,w,extu.w)
|
||||
ATOMIC_FETCH_AND_OP(xor,4,l,mov)
|
||||
|
||||
#define ATOMIC_FETCH_AND_COMBOP(OP,OP0,OP1,N,T,EXT) \
|
||||
.global __sync_fetch_and_##OP##_##N; \
|
||||
HIDDEN_FUNC(__sync_fetch_and_##OP##_##N); \
|
||||
.align 2; \
|
||||
__sync_fetch_and_##OP##_##N:; \
|
||||
mova 1f, r0; \
|
||||
mov r15, r1; \
|
||||
mov #(0f-1f), r15; \
|
||||
0: mov.##T @r4, r2; \
|
||||
mov r5, r3; \
|
||||
OP0 r2, r3; \
|
||||
OP1 r3, r3; \
|
||||
mov.##T r3, @r4; \
|
||||
1: mov r1, r15; \
|
||||
rts; \
|
||||
EXT r2, r0; \
|
||||
ENDFUNC(__sync_fetch_and_##OP##_##N)
|
||||
|
||||
ATOMIC_FETCH_AND_COMBOP(sub,sub,neg,1,b,extu.b)
|
||||
ATOMIC_FETCH_AND_COMBOP(sub,sub,neg,2,w,extu.w)
|
||||
ATOMIC_FETCH_AND_COMBOP(sub,sub,neg,4,l,mov)
|
||||
|
||||
ATOMIC_FETCH_AND_COMBOP(nand,and,not,1,b,extu.b)
|
||||
ATOMIC_FETCH_AND_COMBOP(nand,and,not,2,w,extu.w)
|
||||
ATOMIC_FETCH_AND_COMBOP(nand,and,not,4,l,mov)
|
||||
|
||||
#define ATOMIC_OP_AND_FETCH(OP,N,T,EXT) \
|
||||
.global __sync_##OP##_and_fetch_##N; \
|
||||
HIDDEN_FUNC(__sync_##OP##_and_fetch_##N); \
|
||||
.align 2; \
|
||||
__sync_##OP##_and_fetch_##N:; \
|
||||
mova 1f, r0; \
|
||||
nop; \
|
||||
mov r15, r1; \
|
||||
mov #(0f-1f), r15; \
|
||||
0: mov.##T @r4, r2; \
|
||||
mov r5, r3; \
|
||||
OP r2, r3; \
|
||||
mov.##T r3, @r4; \
|
||||
1: mov r1, r15; \
|
||||
rts; \
|
||||
EXT r3, r0; \
|
||||
ENDFUNC(__sync_##OP##_and_fetch_##N)
|
||||
|
||||
ATOMIC_OP_AND_FETCH(add,1,b,extu.b)
|
||||
ATOMIC_OP_AND_FETCH(add,2,w,extu.w)
|
||||
ATOMIC_OP_AND_FETCH(add,4,l,mov)
|
||||
|
||||
ATOMIC_OP_AND_FETCH(or,1,b,extu.b)
|
||||
ATOMIC_OP_AND_FETCH(or,2,w,extu.w)
|
||||
ATOMIC_OP_AND_FETCH(or,4,l,mov)
|
||||
|
||||
ATOMIC_OP_AND_FETCH(and,1,b,extu.b)
|
||||
ATOMIC_OP_AND_FETCH(and,2,w,extu.w)
|
||||
ATOMIC_OP_AND_FETCH(and,4,l,mov)
|
||||
|
||||
ATOMIC_OP_AND_FETCH(xor,1,b,extu.b)
|
||||
ATOMIC_OP_AND_FETCH(xor,2,w,extu.w)
|
||||
ATOMIC_OP_AND_FETCH(xor,4,l,mov)
|
||||
|
||||
#define ATOMIC_COMBOP_AND_FETCH(OP,OP0,OP1,N,T,EXT) \
|
||||
.global __sync_##OP##_and_fetch_##N; \
|
||||
HIDDEN_FUNC(__sync_##OP##_and_fetch_##N); \
|
||||
.align 2; \
|
||||
__sync_##OP##_and_fetch_##N:; \
|
||||
mova 1f, r0; \
|
||||
mov r15, r1; \
|
||||
mov #(0f-1f), r15; \
|
||||
0: mov.##T @r4, r2; \
|
||||
mov r5, r3; \
|
||||
OP0 r2, r3; \
|
||||
OP1 r3, r3; \
|
||||
mov.##T r3, @r4; \
|
||||
1: mov r1, r15; \
|
||||
rts; \
|
||||
EXT r3, r0; \
|
||||
ENDFUNC(__sync_##OP##_and_fetch_##N)
|
||||
|
||||
ATOMIC_COMBOP_AND_FETCH(sub,sub,neg,1,b,extu.b)
|
||||
ATOMIC_COMBOP_AND_FETCH(sub,sub,neg,2,w,extu.w)
|
||||
ATOMIC_COMBOP_AND_FETCH(sub,sub,neg,4,l,mov)
|
||||
|
||||
ATOMIC_COMBOP_AND_FETCH(nand,and,not,1,b,extu.b)
|
||||
ATOMIC_COMBOP_AND_FETCH(nand,and,not,2,w,extu.w)
|
||||
ATOMIC_COMBOP_AND_FETCH(nand,and,not,4,l,mov)
|
||||
|
||||
.section .note.GNU-stack,"",%progbits
|
||||
.previous
|
||||
|
||||
#endif /* ! __SH5__ */
|
||||
|
|
@ -0,0 +1,81 @@
|
|||
/* Copyright (C) 2012 Free Software Foundation, Inc.
|
||||
|
||||
This file is part of GCC.
|
||||
|
||||
GCC is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3, or (at your option)
|
||||
any later version.
|
||||
|
||||
GCC is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
Under Section 7 of GPL version 3, you are granted additional
|
||||
permissions described in the GCC Runtime Library Exception, version
|
||||
3.1, as published by the Free Software Foundation.
|
||||
|
||||
You should have received a copy of the GNU General Public License and
|
||||
a copy of the GCC Runtime Library Exception along with this program;
|
||||
see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
|
||||
<http://www.gnu.org/licenses/>. */
|
||||
|
||||
/* Atomic built-in C functions for link compatibility with older code that
|
||||
was compiled to emit function calls for atomic built-ins.
|
||||
Notice that if no atomic model has been selected the functions in this
|
||||
file must not be generated, or else they will result in infinite no-op
|
||||
loops.
|
||||
Notice also, that all the generated functions below take three parameters,
|
||||
which is not actually true for some of the built-in functions. However,
|
||||
on SH this does not matter, since the first four parameters are always
|
||||
passed in call clobbered registers.
|
||||
The return type for the sync_bool_compare_and_swap functions is also
|
||||
actually supposed to be a bool, but this also doesn't matter since any
|
||||
int return type <= 32 bit is returned in R0 on SH. */
|
||||
|
||||
#if !__SH_ATOMIC_MODEL_NONE__
|
||||
|
||||
typedef unsigned char uint8_t;
|
||||
typedef unsigned short uint16_t;
|
||||
typedef unsigned int uint32_t;
|
||||
|
||||
#define uint8_t_sz 1
|
||||
#define uint16_t_sz 2
|
||||
#define uint32_t_sz 4
|
||||
|
||||
#define typesz(x) x##_sz
|
||||
|
||||
#define concat(x,y) __ ## x ## _ ## y
|
||||
#define eval(x,y) concat (x,y)
|
||||
#define genname(f,t) eval(f, typesz (t))
|
||||
|
||||
#define func1(name, type) \
|
||||
type __attribute__((visibility("hidden"))) \
|
||||
genname (name, type) (type* x, type y, type z) \
|
||||
{ \
|
||||
return __##name (x, y, z); \
|
||||
}
|
||||
|
||||
#define genfuncs(name) \
|
||||
func1 (name, uint8_t) \
|
||||
func1 (name, uint16_t) \
|
||||
func1 (name, uint32_t)
|
||||
|
||||
genfuncs (sync_lock_test_and_set)
|
||||
genfuncs (sync_val_compare_and_swap)
|
||||
genfuncs (sync_bool_compare_and_swap)
|
||||
genfuncs (sync_fetch_and_add)
|
||||
genfuncs (sync_fetch_and_or)
|
||||
genfuncs (sync_fetch_and_and)
|
||||
genfuncs (sync_fetch_and_xor)
|
||||
genfuncs (sync_fetch_and_sub)
|
||||
genfuncs (sync_fetch_and_nand)
|
||||
genfuncs (sync_add_and_fetch)
|
||||
genfuncs (sync_or_and_fetch)
|
||||
genfuncs (sync_and_and_fetch)
|
||||
genfuncs (sync_xor_and_fetch)
|
||||
genfuncs (sync_sub_and_fetch)
|
||||
genfuncs (sync_nand_and_fetch)
|
||||
|
||||
#endif
|
||||
|
|
@ -1,9 +1,13 @@
|
|||
LIB1ASMFUNCS_CACHE = _ic_invalidate _ic_invalidate_array
|
||||
|
||||
LIB2ADD = $(srcdir)/config/sh/linux-atomic.S
|
||||
LIB2ADD = $(srcdir)/config/sh/linux-atomic.c
|
||||
|
||||
HOST_LIBGCC2_CFLAGS += -mieee -DNO_FPSCR_VALUES
|
||||
|
||||
# Silence atomic built-in related warnings in linux-atomic.c.
|
||||
# Unfortunately the conflicting types warning can't be disabled selectively.
|
||||
HOST_LIBGCC2_CFLAGS += -w -Wno-sync-nand
|
||||
|
||||
# Override t-slibgcc-elf-ver to export some libgcc symbols with
|
||||
# the symbol versions that glibc used, and hide some lib1func
|
||||
# routines which should not be called via PLT. We have to create
|
||||
|
|
|
|||
Loading…
Reference in New Issue