From 95d966091d95ada985eacfaf8664acaa6ef33df6 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 14 Feb 2017 18:52:37 +0100 Subject: [PATCH] re PR target/79495 (ICE in extract_constrain_insn, at recog.c:2213) PR target/79495 * config/i386/i386.md (*movxf_internal): Add (o,rC) alternative. testsuite/ChangeLog: 2017-02-14 Uros Bizjak PR target/79495 * gcc.target/i386/pr79495.c: New test. From-SVN: r245441 --- gcc/ChangeLog | 5 +++++ gcc/config/i386/i386.md | 14 +++++++------- gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr79495.c | 11 +++++++++++ 4 files changed, 28 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr79495.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2a4c2c44d30..9bb58c785bf 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2017-02-14 Uros Bizjak + + PR target/79495 + * config/i386/i386.md (*movxf_internal): Add (o,rC) alternative. + 2017-02-14 H.J. Lu PR target/79498 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 3af1ffc5dac..9d4dc3894a9 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -3248,9 +3248,9 @@ ;; in alternatives 4, 6, 7 and 8. (define_insn "*movxf_internal" [(set (match_operand:XF 0 "nonimmediate_operand" - "=f,m,f,?r ,!o,?*r ,!o,!o,!o,r ,o") + "=f,m,f,?r ,!o,?*r ,!o,!o,!o,r ,o ,o") (match_operand:XF 1 "general_operand" - "fm,f,G,roF,r , *roF,*r,F ,C,roF,rF"))] + "fm,f,G,roF,r ,*roF,*r,F ,C ,roF,rF,rC"))] "!(MEM_P (operands[0]) && MEM_P (operands[1])) && (lra_in_progress || reload_completed || !CONST_DOUBLE_P (operands[1]) @@ -3277,19 +3277,19 @@ } } [(set (attr "isa") - (cond [(eq_attr "alternative" "7") + (cond [(eq_attr "alternative" "7,10") (const_string "nox64") - (eq_attr "alternative" "8") + (eq_attr "alternative" "8,11") (const_string "x64") ] (const_string "*"))) (set (attr "type") - (cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10") + (cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10,11") (const_string "multi") ] (const_string "fmov"))) (set (attr "mode") - (cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10") + (cond [(eq_attr "alternative" "3,4,5,6,7,8,9,10,11") (if_then_else (match_test "TARGET_64BIT") (const_string "DI") (const_string "SI")) @@ -3300,7 +3300,7 @@ (symbol_ref "false")] (symbol_ref "true"))) (set (attr "enabled") - (cond [(eq_attr "alternative" "9,10") + (cond [(eq_attr "alternative" "9,10,11") (if_then_else (match_test "TARGET_HARD_XF_REGS") (symbol_ref "false") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index be1ea5c035b..429762aeb25 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-02-14 Uros Bizjak + + PR target/79495 + * gcc.target/i386/pr79495.c: New test. + 2017-02-14 Marek Polacek PR c++/79420 diff --git a/gcc/testsuite/gcc.target/i386/pr79495.c b/gcc/testsuite/gcc.target/i386/pr79495.c new file mode 100644 index 00000000000..27f48facbd2 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr79495.c @@ -0,0 +1,11 @@ +/* PR target/79495 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msoft-float" } */ + +long double dnan = 1.0l/0.0l - 1.0l/0.0l; +long double x = 1.0l; +void fn1 (void) +{ + if (dnan != x) + x = 1.0; +}