re PR target/53334 (ICE in extract_insn, at recog.c:2131)
Fix PR target/53334
2012-05-22 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
PR target/53334
* config/arm/arm-protos.h (arm_validize_comparison): Declare.
* config/arm/arm.c (arm_validize_comparison): Define.
* config/arm/arm.md ("cbranchsi4"): Cleanup expansion and use
arm_validize_comparison.
("cbranchdi4"): Likewise.
("cstoredi4"): Likewise.
("movsicc"): Likewise.
("movsfcc"): Likewise.
("movdfcc"): Likewise.
From-SVN: r187761
This commit is contained in:
Ramana Radhakrishnan
parent
7c2dbbdc48
commit
95ffee1fce
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@ -1,7 +1,20 @@
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2012-05-22 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
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PR target/53334
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* config/arm/arm-protos.h (arm_validize_comparison): Declare.
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* config/arm/arm.c (arm_validize_comparison): Define.
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* config/arm/arm.md ("cbranchsi4"): Cleanup expansion and use
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arm_validize_comparison.
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("cbranchdi4"): Likewise.
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("cstoredi4"): Likewise.
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("movsicc"): Likewise.
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("movsfcc"): Likewise.
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("movdfcc"): Likewise.
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2012-05-22 Dimitrios Apostolou <jimis@gmx.net>
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* df-scan.c (df_scan_alloc): Round up allocation pools size, reduce
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the mw_reg_pool size.
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the mw_reg_pool size.
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2012-05-22 Paolo Bonzini <bonzini@gnu.org>
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@ -248,6 +248,7 @@ extern int vfp3_const_double_for_fract_bits (rtx);
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extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
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rtx);
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extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
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#endif /* RTX_CODE */
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extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
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@ -26185,4 +26185,54 @@ arm_emit_coreregs_64bit_shift (enum rtx_code code, rtx out, rtx in,
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#undef BRANCH
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}
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/* Returns true if a valid comparison operation and makes
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the operands in a form that is valid. */
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bool
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arm_validize_comparison (rtx *comparison, rtx * op1, rtx * op2)
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{
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enum rtx_code code = GET_CODE (*comparison);
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enum rtx_code canonical_code;
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enum machine_mode mode = (GET_MODE (*op1) == VOIDmode)
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? GET_MODE (*op2) : GET_MODE (*op1);
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gcc_assert (GET_MODE (*op1) != VOIDmode || GET_MODE (*op2) != VOIDmode);
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if (code == UNEQ || code == LTGT)
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return false;
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canonical_code = arm_canonicalize_comparison (code, op1, op2);
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PUT_CODE (*comparison, canonical_code);
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switch (mode)
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{
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case SImode:
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if (!arm_add_operand (*op1, mode))
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*op1 = force_reg (mode, *op1);
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if (!arm_add_operand (*op2, mode))
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*op2 = force_reg (mode, *op2);
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return true;
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case DImode:
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if (!cmpdi_operand (*op1, mode))
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*op1 = force_reg (mode, *op1);
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if (!cmpdi_operand (*op2, mode))
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*op2 = force_reg (mode, *op2);
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return true;
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case SFmode:
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case DFmode:
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if (!arm_float_compare_operand (*op1, mode))
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*op1 = force_reg (mode, *op1);
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if (!arm_float_compare_operand (*op2, mode))
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*op2 = force_reg (mode, *op2);
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return true;
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default:
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break;
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}
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return false;
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}
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#include "gt-arm.h"
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@ -6977,12 +6977,12 @@
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(match_operand:SI 2 "nonmemory_operand" "")])
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(label_ref (match_operand 3 "" ""))
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(pc)))]
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"TARGET_THUMB1 || TARGET_32BIT"
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"TARGET_EITHER"
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"
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if (!TARGET_THUMB1)
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{
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if (!arm_add_operand (operands[2], SImode))
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operands[2] = force_reg (SImode, operands[2]);
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if (!arm_validize_comparison (&operands[0], &operands[1], &operands[2]))
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FAIL;
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emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
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operands[3]));
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DONE;
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@ -7054,33 +7054,13 @@
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(pc)))]
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"TARGET_32BIT"
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"{
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rtx swap = NULL_RTX;
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enum rtx_code code = GET_CODE (operands[0]);
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/* We should not have two constants. */
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gcc_assert (GET_MODE (operands[1]) == DImode
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|| GET_MODE (operands[2]) == DImode);
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/* Flip unimplemented DImode comparisons to a form that
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arm_gen_compare_reg can handle. */
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switch (code)
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{
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case GT:
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swap = gen_rtx_LT (VOIDmode, operands[2], operands[1]); break;
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case LE:
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swap = gen_rtx_GE (VOIDmode, operands[2], operands[1]); break;
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case GTU:
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swap = gen_rtx_LTU (VOIDmode, operands[2], operands[1]); break;
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case LEU:
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swap = gen_rtx_GEU (VOIDmode, operands[2], operands[1]); break;
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default:
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break;
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}
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if (swap)
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emit_jump_insn (gen_cbranch_cc (swap, operands[2], operands[1],
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operands[3]));
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else
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emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
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if (!arm_validize_comparison (&operands[0], &operands[1], &operands[2]))
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FAIL;
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emit_jump_insn (gen_cbranch_cc (operands[0], operands[1], operands[2],
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operands[3]));
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DONE;
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}"
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@ -8065,33 +8045,15 @@
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(match_operand:DI 3 "cmpdi_operand" "")]))]
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"TARGET_32BIT"
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"{
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rtx swap = NULL_RTX;
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enum rtx_code code = GET_CODE (operands[1]);
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/* We should not have two constants. */
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gcc_assert (GET_MODE (operands[2]) == DImode
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|| GET_MODE (operands[3]) == DImode);
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/* Flip unimplemented DImode comparisons to a form that
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arm_gen_compare_reg can handle. */
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switch (code)
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{
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case GT:
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swap = gen_rtx_LT (VOIDmode, operands[3], operands[2]); break;
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case LE:
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swap = gen_rtx_GE (VOIDmode, operands[3], operands[2]); break;
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case GTU:
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swap = gen_rtx_LTU (VOIDmode, operands[3], operands[2]); break;
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case LEU:
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swap = gen_rtx_GEU (VOIDmode, operands[3], operands[2]); break;
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default:
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break;
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}
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if (swap)
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emit_insn (gen_cstore_cc (operands[0], swap, operands[3],
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operands[2]));
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else
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emit_insn (gen_cstore_cc (operands[0], operands[1], operands[2],
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if (!arm_validize_comparison (&operands[1],
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&operands[2],
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&operands[3]))
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FAIL;
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emit_insn (gen_cstore_cc (operands[0], operands[1], operands[2],
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operands[3]));
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DONE;
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}"
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@ -8186,12 +8148,14 @@
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"TARGET_32BIT"
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"
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{
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enum rtx_code code = GET_CODE (operands[1]);
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enum rtx_code code;
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rtx ccreg;
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if (code == UNEQ || code == LTGT)
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if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0),
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&XEXP (operands[1], 1)))
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FAIL;
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code = GET_CODE (operands[1]);
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ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
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XEXP (operands[1], 1), NULL_RTX);
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operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
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@ -8202,22 +8166,18 @@
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[(set (match_operand:SF 0 "s_register_operand" "")
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(if_then_else:SF (match_operand 1 "expandable_comparison_operator" "")
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(match_operand:SF 2 "s_register_operand" "")
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(match_operand:SF 3 "nonmemory_operand" "")))]
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(match_operand:SF 3 "arm_float_add_operand" "")))]
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"TARGET_32BIT && TARGET_HARD_FLOAT"
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"
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{
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enum rtx_code code = GET_CODE (operands[1]);
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rtx ccreg;
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if (code == UNEQ || code == LTGT)
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FAIL;
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/* When compiling for SOFT_FLOAT, ensure both arms are in registers.
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Otherwise, ensure it is a valid FP add operand */
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if ((!(TARGET_HARD_FLOAT && TARGET_FPA))
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|| (!arm_float_add_operand (operands[3], SFmode)))
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operands[3] = force_reg (SFmode, operands[3]);
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if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0),
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&XEXP (operands[1], 1)))
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FAIL;
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code = GET_CODE (operands[1]);
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ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
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XEXP (operands[1], 1), NULL_RTX);
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operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
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@ -8235,9 +8195,10 @@
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enum rtx_code code = GET_CODE (operands[1]);
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rtx ccreg;
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if (code == UNEQ || code == LTGT)
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FAIL;
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if (!arm_validize_comparison (&operands[1], &XEXP (operands[1], 0),
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&XEXP (operands[1], 1)))
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FAIL;
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code = GET_CODE (operands[1]);
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ccreg = arm_gen_compare_reg (code, XEXP (operands[1], 0),
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XEXP (operands[1], 1), NULL_RTX);
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operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
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