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aarch64: Add support for unpacked sub [PR96366]

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The test case bb-slp-20.c in the gcc testsuit will cause an
ICE in the expand pass due to the lack of a pattern for
subtraction of the VNx2SI mode. This patch solve this problem
by adding support for unpacked sub.

gcc/ChangeLog:

	* config/aarch64/aarch64-sve.md (sub<mode>3): Add support for
	unpacked vectors.
This commit is contained in:
Bu Le 2020-08-03 16:38:46 +01:00 committed by Richard Sandiford
parent 401070d8b4
commit 9623f61b14
1 changed files with 4 additions and 4 deletions
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8
gcc/config/aarch64/aarch64-sve.md
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@ -3644,10 +3644,10 @@
;; -------------------------------------------------------------------------
(define_insn "sub<mode>3"
[(set (match_operand:SVE_FULL_I 0 "register_operand" "=w, w, ?&w")
(minus:SVE_FULL_I
(match_operand:SVE_FULL_I 1 "aarch64_sve_arith_operand" "w, vsa, vsa")
(match_operand:SVE_FULL_I 2 "register_operand" "w, 0, w")))]
[(set (match_operand:SVE_I 0 "register_operand" "=w, w, ?&w")
(minus:SVE_I
(match_operand:SVE_I 1 "aarch64_sve_arith_operand" "w, vsa, vsa")
(match_operand:SVE_I 2 "register_operand" "w, 0, w")))]
"TARGET_SVE"
"@
sub\t%0.<Vetype>, %1.<Vetype>, %2.<Vetype>