backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores)

2017-06-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

	Back port from mainline
	PR target/80510
	* gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until
	32-bit support is added.  Change ITYPE size to 64-bit integer.
	* gcc.target/powerpc/pr80510-2.c: Likewise.

From-SVN: r249488
This commit is contained in:
Michael Meissner 2017-06-21 22:51:15 +00:00 committed by Michael Meissner
parent ceccf94fd2
commit 967348bc04
3 changed files with 18 additions and 6 deletions

View File

@ -1,3 +1,11 @@
2017-06-21 Michael Meissner <meissner@linux.vnet.ibm.com>
Back port from mainline
PR target/80510
* gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until
32-bit support is added. Change ITYPE size to 64-bit integer.
* gcc.target/powerpc/pr80510-2.c: Likewise.
2017-06-21 Jakub Jelinek <jakub@redhat.com>
PR c++/81154

View File

@ -1,4 +1,4 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
@ -6,7 +6,9 @@
/* Make sure that STXSDX is generated for double scalars in Altivec registers
on power7 instead of moving the value to a FPR register and doing a X-FORM
store. */
store.
32-bit currently does not have support for STXSDX in the mov{df,dd} patterns. */
#ifndef TYPE
#define TYPE double
@ -21,7 +23,7 @@
#endif
#ifndef ITYPE
#define ITYPE long
#define ITYPE __INT64_TYPE__
#endif
#ifdef DO_CALL

View File

@ -1,4 +1,4 @@
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_p8vector_ok } */
/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
@ -6,7 +6,9 @@
/* Make sure that STXSSPX is generated for float scalars in Altivec registers
on power7 instead of moving the value to a FPR register and doing a X-FORM
store. */
store.
32-bit currently does not have support for STXSSPX in the mov{sf,sd} patterns. */
#ifndef TYPE
#define TYPE float
@ -21,7 +23,7 @@
#endif
#ifndef ITYPE
#define ITYPE long
#define ITYPE __INT64_TYPE__
#endif
#ifdef DO_CALL