From 967348bc04280152c2a8109310c28cfcbb08951a Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Wed, 21 Jun 2017 22:51:15 +0000 Subject: [PATCH] backport: re PR target/80510 (Optimize Power7/power8 Altivec load/stores) 2017-06-21 Michael Meissner Back port from mainline PR target/80510 * gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until 32-bit support is added. Change ITYPE size to 64-bit integer. * gcc.target/powerpc/pr80510-2.c: Likewise. From-SVN: r249488 --- gcc/testsuite/ChangeLog | 8 ++++++++ gcc/testsuite/gcc.target/powerpc/pr80510-1.c | 8 +++++--- gcc/testsuite/gcc.target/powerpc/pr80510-2.c | 8 +++++--- 3 files changed, 18 insertions(+), 6 deletions(-) diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 38f0ee50fb4..e7fc9630881 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,11 @@ +2017-06-21 Michael Meissner + + Back port from mainline + PR target/80510 + * gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until + 32-bit support is added. Change ITYPE size to 64-bit integer. + * gcc.target/powerpc/pr80510-2.c: Likewise. + 2017-06-21 Jakub Jelinek PR c++/81154 diff --git a/gcc/testsuite/gcc.target/powerpc/pr80510-1.c b/gcc/testsuite/gcc.target/powerpc/pr80510-1.c index 8bff3ce15c3..f9d9fde49e5 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr80510-1.c +++ b/gcc/testsuite/gcc.target/powerpc/pr80510-1.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ /* { dg-require-effective-target powerpc_vsx_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */ @@ -6,7 +6,9 @@ /* Make sure that STXSDX is generated for double scalars in Altivec registers on power7 instead of moving the value to a FPR register and doing a X-FORM - store. */ + store. + + 32-bit currently does not have support for STXSDX in the mov{df,dd} patterns. */ #ifndef TYPE #define TYPE double @@ -21,7 +23,7 @@ #endif #ifndef ITYPE -#define ITYPE long +#define ITYPE __INT64_TYPE__ #endif #ifdef DO_CALL diff --git a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c index 2f7107b8782..6edcc36e065 100644 --- a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c +++ b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c @@ -1,4 +1,4 @@ -/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ /* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ /* { dg-require-effective-target powerpc_p8vector_ok } */ /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ @@ -6,7 +6,9 @@ /* Make sure that STXSSPX is generated for float scalars in Altivec registers on power7 instead of moving the value to a FPR register and doing a X-FORM - store. */ + store. + + 32-bit currently does not have support for STXSSPX in the mov{sf,sd} patterns. */ #ifndef TYPE #define TYPE float @@ -21,7 +23,7 @@ #endif #ifndef ITYPE -#define ITYPE long +#define ITYPE __INT64_TYPE__ #endif #ifdef DO_CALL