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arm.c (note_invalid_constants): Don't return a result. 

* arm.c (note_invalid_constants): Don't return a result.
	(arm_memory_load_p): Delete function.
	(arm_const_double_rtx): Delete iterator variable i;
	(fp_immediate_constant): Likewise.
	(fp_const_from_val): Likewise.

	* arm.c (arm_init_iwmmxt_builtins): Delete void_ftype_void.

From-SVN: r188672
This commit is contained in:
Richard Earnshaw 2012-06-15 16:51:25 +00:00 committed by Richard Earnshaw
parent 9e1a8dd161
commit 96adb18373
2 changed files with 15 additions and 54 deletions
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10
gcc/ChangeLog
View File

@ -1,3 +1,13 @@
2012-06-15 Richard Earnshaw <rearnsha@arm.com>
* arm.c (note_invalid_constants): Don't return a result.
(arm_memory_load_p): Delete function.
(arm_const_double_rtx): Delete iterator variable i;
(fp_immediate_constant): Likewise.
(fp_const_from_val): Likewise.
* arm.c (arm_init_iwmmxt_builtins): Delete void_ftype_void.
2012-06-15 Marc Glisse <marc.glisse@inria.fr>
PR c++/51033

59
gcc/config/arm/arm.c
View File

@ -117,7 +117,7 @@ static void push_minipool_barrier (rtx, HOST_WIDE_INT);
static void push_minipool_fix (rtx, HOST_WIDE_INT, rtx *, enum machine_mode,
rtx);
static void arm_reorg (void);
static bool note_invalid_constants (rtx, HOST_WIDE_INT, int);
static void note_invalid_constants (rtx, HOST_WIDE_INT, int);
static unsigned long arm_compute_save_reg0_reg12_mask (void);
static unsigned long arm_compute_save_reg_mask (void);
static unsigned long arm_isr_value (tree);
@ -166,7 +166,6 @@ static bool arm_rtx_costs (rtx, int, int, int, int *, bool);
static int arm_address_cost (rtx, bool);
static int arm_register_move_cost (enum machine_mode, reg_class_t, reg_class_t);
static int arm_memory_move_cost (enum machine_mode, reg_class_t, bool);
static bool arm_memory_load_p (rtx);
static void arm_init_builtins (void);
static void arm_init_iwmmxt_builtins (void);
static rtx safe_vector_operand (rtx, enum machine_mode);
@ -8695,7 +8694,6 @@ int
arm_const_double_rtx (rtx x)
{
REAL_VALUE_TYPE r;
int i;
if (!fp_consts_inited)
init_fp_table ();
@ -9745,41 +9743,6 @@ arm_return_in_msb (const_tree valtype)
|| FIXED_POINT_TYPE_P (valtype)));
}
/* Returns TRUE if INSN is an "LDR REG, ADDR" instruction.
Use by the Cirrus Maverick code which has to workaround
a hardware bug triggered by such instructions. */
static bool
arm_memory_load_p (rtx insn)
{
rtx body, lhs, rhs;;
if (insn == NULL_RTX || GET_CODE (insn) != INSN)
return false;
body = PATTERN (insn);
if (GET_CODE (body) != SET)
return false;
lhs = XEXP (body, 0);
rhs = XEXP (body, 1);
lhs = REG_OR_SUBREG_RTX (lhs);
/* If the destination is not a general purpose
register we do not have to worry. */
if (GET_CODE (lhs) != REG
|| REGNO_REG_CLASS (REGNO (lhs)) != GENERAL_REGS)
return false;
/* As well as loads from memory we also have to react
to loads of invalid constants which will be turned
into loads from the minipool. */
return (GET_CODE (rhs) == MEM
|| GET_CODE (rhs) == SYMBOL_REF
|| note_invalid_constants (insn, -1, false));
}
/* Return TRUE if X references a SYMBOL_REF. */
int
symbol_mentioned_p (rtx x)
@ -13245,13 +13208,10 @@ arm_const_double_by_immediates (rtx val)
/* Scan INSN and note any of its operands that need fixing.
If DO_PUSHES is false we do not actually push any of the fixups
needed. The function returns TRUE if any fixups were needed/pushed.
This is used by arm_memory_load_p() which needs to know about loads
of constants that will be converted into minipool loads. */
static bool
needed. */
static void
note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
{
bool result = false;
int opno;
extract_insn (insn);
@ -13260,7 +13220,7 @@ note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
fatal_insn_not_found (insn);
if (recog_data.n_alternatives == 0)
return false;
return;
/* Fill in recog_op_alt with information about the constraints of
this insn. */
@ -13285,7 +13245,6 @@ note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
if (do_pushes)
push_minipool_fix (insn, address, recog_data.operand_loc[opno],
recog_data.operand_mode[opno], op);
result = true;
}
else if (GET_CODE (op) == MEM
&& GET_CODE (XEXP (op, 0)) == SYMBOL_REF
@ -13308,12 +13267,11 @@ note_invalid_constants (rtx insn, HOST_WIDE_INT address, int do_pushes)
recog_data.operand_mode[opno], cop);
}
result = true;
}
}
}
return result;
return;
}
/* Convert instructions to their cc-clobbering variant if possible, since
@ -13670,7 +13628,6 @@ const char *
fp_immediate_constant (rtx x)
{
REAL_VALUE_TYPE r;
int i;
if (!fp_consts_inited)
init_fp_table ();
@ -13685,8 +13642,6 @@ fp_immediate_constant (rtx x)
static const char *
fp_const_from_val (REAL_VALUE_TYPE *r)
{
int i;
if (!fp_consts_inited)
init_fp_table ();
@ -20494,10 +20449,6 @@ arm_init_iwmmxt_builtins (void)
long_long_unsigned_type_node,
integer_type_node, NULL_TREE);
tree void_ftype_void
= build_function_type_list (void_type_node,
NULL_TREE);
tree void_ftype_int
= build_function_type_list (void_type_node,
integer_type_node, NULL_TREE);