arm: Split xorsi with constant after reload.
This puts xorsi3 in the same format as andsi3 and iorsi3. This similarity fixes code generation issues with splitting atomic_fetch_xor post-reload. * config/arm/arm.md (*arm_xorsi3): Match iorsi3 and perform post-reload splitting. From-SVN: r182562
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2011-12-20 Richard Henderson <rth@redhat.com>
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2011-12-20 Richard Henderson <rth@redhat.com>
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* config/arm/arm.md (*arm_xorsi3): Match iorsi3 and perform
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post-reload splitting.
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* config/arm/arm.md (*arm_cmpdi_unsigned): Enable for thumb2.
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* config/arm/arm.md (*arm_cmpdi_unsigned): Enable for thumb2.
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* config/arm/arm.c (arm_select_cc_mode): Use it.
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* config/arm/arm.c (arm_select_cc_mode): Use it.
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@ -3061,13 +3061,25 @@
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}"
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}"
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)
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)
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(define_insn "*arm_xorsi3"
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(define_insn_and_split "*arm_xorsi3"
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[(set (match_operand:SI 0 "s_register_operand" "=r")
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[(set (match_operand:SI 0 "s_register_operand" "=r,r")
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(xor:SI (match_operand:SI 1 "s_register_operand" "r")
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(xor:SI (match_operand:SI 1 "s_register_operand" "%r,r")
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(match_operand:SI 2 "arm_rhs_operand" "rI")))]
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(match_operand:SI 2 "reg_or_int_operand" "rI,?n")))]
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"TARGET_32BIT"
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"TARGET_32BIT"
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"eor%?\\t%0, %1, %2"
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"@
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[(set_attr "predicable" "yes")]
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eor%?\\t%0, %1, %2
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#"
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"TARGET_32BIT
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&& GET_CODE (operands[2]) == CONST_INT
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&& !const_ok_for_arm (INTVAL (operands[2]))"
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[(clobber (const_int 0))]
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{
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arm_split_constant (XOR, SImode, curr_insn,
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INTVAL (operands[2]), operands[0], operands[1], 0);
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DONE;
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}
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[(set_attr "length" "4,16")
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(set_attr "predicable" "yes")]
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)
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)
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(define_insn "*thumb1_xorsi3_insn"
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(define_insn "*thumb1_xorsi3_insn"
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