200x-xx-xx Julian Brown <julian@codesourcery.com>
gcc/ 200x-xx-xx Julian Brown <julian@codesourcery.com> * config/m68k/m68k.h (TARGET_ISAB): New macro. * config/m68k/m68k.c: Use TARGET_ISAB rather than TARGET_CFV4. * config/m68k/m68k.md: Likewise. From-SVN: r120709
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@ -1,3 +1,9 @@
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2007-01-12 Julian Brown <julian@codesourcery.com>
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* config/m68k/m68k.h (TARGET_ISAB): New macro.
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* config/m68k/m68k.c: Use TARGET_ISAB rather than TARGET_CFV4.
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* config/m68k/m68k.md: Likewise.
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2007-01-12 Julian Brown <julian@codesourcery.com>
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2007-01-12 Julian Brown <julian@codesourcery.com>
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* config/m68k/m68k.h (LEGITIMATE_INDEX_P, LEGITIMIZE_ADDRESS): Use
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* config/m68k/m68k.h (LEGITIMATE_INDEX_P, LEGITIMIZE_ADDRESS): Use
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@ -1562,7 +1562,7 @@ const_method (rtx constant)
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if (USE_MOVQ ((u >> 16) | (u << 16)))
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if (USE_MOVQ ((u >> 16) | (u << 16)))
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return SWAP;
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return SWAP;
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if (TARGET_CFV4)
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if (TARGET_ISAB)
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{
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{
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/* Try using MVZ/MVS with an immediate value to load constants. */
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/* Try using MVZ/MVS with an immediate value to load constants. */
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if (i >= 0 && i <= 65535)
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if (i >= 0 && i <= 65535)
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@ -1779,7 +1779,7 @@ valid_mov3q_const (rtx constant)
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{
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{
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int i;
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int i;
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if (TARGET_CFV4 && GET_CODE (constant) == CONST_INT)
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if (TARGET_ISAB && GET_CODE (constant) == CONST_INT)
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{
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{
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i = INTVAL (constant);
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i = INTVAL (constant);
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if (i == -1 || (i >= 1 && i <= 7))
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if (i == -1 || (i >= 1 && i <= 7))
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@ -126,6 +126,8 @@ Boston, MA 02110-1301, USA. */
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/* Size (in bytes) of FPU registers. */
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/* Size (in bytes) of FPU registers. */
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#define TARGET_FP_REG_SIZE (TARGET_COLDFIRE ? 8 : 12)
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#define TARGET_FP_REG_SIZE (TARGET_COLDFIRE ? 8 : 12)
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#define TARGET_ISAB TARGET_CFV4
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#define TUNE_68000_10 (!TARGET_68020 && !TARGET_COLDFIRE)
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#define TUNE_68000_10 (!TARGET_68020 && !TARGET_COLDFIRE)
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#define TUNE_68030 TARGET_68030
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#define TUNE_68030 TARGET_68030
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#define TUNE_68040 TARGET_68040
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#define TUNE_68040 TARGET_68040
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@ -682,13 +682,13 @@
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(define_insn "*movsi_cf"
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(define_insn "*movsi_cf"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r<Q>,g,U")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r<Q>,g,U")
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(match_operand:SI 1 "general_operand" "g,r<Q>,U"))]
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(match_operand:SI 1 "general_operand" "g,r<Q>,U"))]
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"TARGET_COLDFIRE && !TARGET_CFV4"
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"TARGET_COLDFIRE && !TARGET_ISAB"
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"* return output_move_simode (operands);")
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"* return output_move_simode (operands);")
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(define_insn "*movsi_cfv4"
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(define_insn "*movsi_cfv4"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r<Q>,g,U")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=r<Q>,g,U")
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(match_operand:SI 1 "general_operand" "Rg,Rr<Q>,U"))]
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(match_operand:SI 1 "general_operand" "Rg,Rr<Q>,U"))]
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"TARGET_CFV4"
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"TARGET_ISAB"
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"* return output_move_simode (operands);")
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"* return output_move_simode (operands);")
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;; Special case of fullword move, where we need to get a non-GOT PIC
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;; Special case of fullword move, where we need to get a non-GOT PIC
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@ -1389,7 +1389,7 @@
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(define_insn "*zero_extendhisi2_cf"
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(define_insn "*zero_extendhisi2_cf"
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[(set (match_operand:SI 0 "register_operand" "=d")
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[(set (match_operand:SI 0 "register_operand" "=d")
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(zero_extend:SI (match_operand:HI 1 "nonimmediate_src_operand" "rmS")))]
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(zero_extend:SI (match_operand:HI 1 "nonimmediate_src_operand" "rmS")))]
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"TARGET_CFV4"
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"TARGET_ISAB"
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"mvz%.w %1,%0")
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"mvz%.w %1,%0")
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(define_insn "zero_extendhisi2"
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(define_insn "zero_extendhisi2"
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@ -1413,7 +1413,7 @@
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(define_insn "*zero_extendqisi2_cfv4"
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(define_insn "*zero_extendqisi2_cfv4"
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[(set (match_operand:SI 0 "register_operand" "=d")
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[(set (match_operand:SI 0 "register_operand" "=d")
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(zero_extend:SI (match_operand:QI 1 "nonimmediate_src_operand" "dmS")))]
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(zero_extend:SI (match_operand:QI 1 "nonimmediate_src_operand" "dmS")))]
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"TARGET_CFV4"
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"TARGET_ISAB"
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"mvz%.b %1,%0")
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"mvz%.b %1,%0")
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(define_insn "zero_extendqisi2"
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(define_insn "zero_extendqisi2"
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@ -1427,7 +1427,9 @@
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(define_split
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(define_split
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[(set (match_operand 0 "register_operand" "")
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[(set (match_operand 0 "register_operand" "")
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(zero_extend (match_operand 1 "nonimmediate_src_operand" "")))]
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(zero_extend (match_operand 1 "nonimmediate_src_operand" "")))]
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"!TARGET_CFV4 && reload_completed && reg_mentioned_p (operands[0], operands[1])"
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"!TARGET_ISAB
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&& reload_completed
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&& reg_mentioned_p (operands[0], operands[1])"
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[(set (strict_low_part (match_dup 2))
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[(set (strict_low_part (match_dup 2))
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(match_dup 1))
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(match_dup 1))
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(set (match_dup 0)
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(set (match_dup 0)
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@ -1441,7 +1443,7 @@
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(define_split
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(define_split
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[(set (match_operand 0 "register_operand" "")
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[(set (match_operand 0 "register_operand" "")
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(zero_extend (match_operand 1 "nonimmediate_src_operand" "")))]
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(zero_extend (match_operand 1 "nonimmediate_src_operand" "")))]
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"!TARGET_CFV4 && reload_completed"
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"!TARGET_ISAB && reload_completed"
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[(set (match_dup 0)
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[(set (match_dup 0)
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(const_int 0))
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(const_int 0))
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(set (strict_low_part (match_dup 2))
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(set (strict_low_part (match_dup 2))
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@ -1459,7 +1461,7 @@
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{
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{
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CC_STATUS_INIT;
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CC_STATUS_INIT;
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operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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if (TARGET_CFV4)
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if (TARGET_ISAB)
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return "mvs%.b %1,%2\;smi %0\;extb%.l %0";
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return "mvs%.b %1,%2\;smi %0\;extb%.l %0";
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if (TARGET_68020 || TARGET_COLDFIRE)
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if (TARGET_68020 || TARGET_COLDFIRE)
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{
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{
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@ -1485,7 +1487,7 @@
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{
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{
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CC_STATUS_INIT;
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CC_STATUS_INIT;
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operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
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if (TARGET_CFV4)
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if (TARGET_ISAB)
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return "mvs%.w %1,%2\;smi %0\;extb%.l %0";
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return "mvs%.w %1,%2\;smi %0\;extb%.l %0";
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if (TARGET_68020 || TARGET_COLDFIRE)
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if (TARGET_68020 || TARGET_COLDFIRE)
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return "move%.w %1,%2\;ext%.l %2\;smi %0\;extb%.l %0";
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return "move%.w %1,%2\;ext%.l %2\;smi %0\;extb%.l %0";
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@ -1549,14 +1551,14 @@
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
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(sign_extend:SI
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(sign_extend:SI
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(match_operand:HI 1 "nonimmediate_src_operand" "rmS")))]
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(match_operand:HI 1 "nonimmediate_src_operand" "rmS")))]
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"TARGET_CFV4"
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"TARGET_ISAB"
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"mvs%.w %1,%0")
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"mvs%.w %1,%0")
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(define_insn "*68k_extendhisi2"
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(define_insn "*68k_extendhisi2"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=*d,a")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=*d,a")
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(sign_extend:SI
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(sign_extend:SI
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(match_operand:HI 1 "nonimmediate_src_operand" "0,rmS")))]
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(match_operand:HI 1 "nonimmediate_src_operand" "0,rmS")))]
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"!TARGET_CFV4"
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"!TARGET_ISAB"
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{
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{
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if (ADDRESS_REG_P (operands[0]))
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if (ADDRESS_REG_P (operands[0]))
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return "move%.w %1,%0";
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return "move%.w %1,%0";
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@ -1578,13 +1580,13 @@
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(define_insn "*cfv4_extendqisi2"
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(define_insn "*cfv4_extendqisi2"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
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(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "rms")))]
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(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "rms")))]
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"TARGET_CFV4"
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"TARGET_ISAB"
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"mvs%.b %1,%0")
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"mvs%.b %1,%0")
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(define_insn "*68k_extendqisi2"
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(define_insn "*68k_extendqisi2"
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
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[(set (match_operand:SI 0 "nonimmediate_operand" "=d")
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(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "0")))]
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(sign_extend:SI (match_operand:QI 1 "nonimmediate_operand" "0")))]
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"TARGET_68020 || (TARGET_COLDFIRE && !TARGET_CFV4)"
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"TARGET_68020 || (TARGET_COLDFIRE && !TARGET_ISAB)"
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"extb%.l %0")
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"extb%.l %0")
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;; Conversions between float and double.
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;; Conversions between float and double.
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@ -3094,7 +3096,7 @@
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(umod:HI (match_dup 1) (match_dup 2)))]
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(umod:HI (match_dup 1) (match_dup 2)))]
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"!TARGET_COLDFIRE || TARGET_CF_HWDIV"
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"!TARGET_COLDFIRE || TARGET_CF_HWDIV"
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{
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{
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if (TARGET_CFV4)
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if (TARGET_ISAB)
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output_asm_insn (MOTOROLA ?
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output_asm_insn (MOTOROLA ?
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"mvz%.w %0,%0\;divu%.w %2,%0" :
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"mvz%.w %0,%0\;divu%.w %2,%0" :
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"mvz%.w %0,%0\;divu %2,%0",
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"mvz%.w %0,%0\;divu %2,%0",
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(match_operand:SI 2 "general_src_operand" "d,dmsK")))]
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(match_operand:SI 2 "general_src_operand" "d,dmsK")))]
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"TARGET_COLDFIRE"
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"TARGET_COLDFIRE"
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{
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{
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if (TARGET_CFV4 && DATA_REG_P (operands[0])
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if (TARGET_ISAB
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&& DATA_REG_P (operands[0])
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&& GET_CODE (operands[2]) == CONST_INT)
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&& GET_CODE (operands[2]) == CONST_INT)
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{
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{
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if (INTVAL (operands[2]) == 0x000000ff)
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if (INTVAL (operands[2]) == 0x000000ff)
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