re PR target/49313 (Inefficient libgcc implementations for avr)
PR target/49313 * config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add _moddi3, _umoddi3. (LIB1ASMFUNCS): Add _divdi3, _udivdi3, _udivmod64, _negdi2. * config/avr/lib1funcs.S (wmov): New assembler macro. (__umoddi3, __udivdi3, __udivdi3_umoddi3): New functions. (__moddi3, __divdi3, __divdi3_moddi3): New functions. (__udivmod64): New function. (__negdi2): New function. From-SVN: r181551
This commit is contained in:
Georg-Johann Lay
Georg-Johann Lay
parent
515a0cfc80
commit
989bdb7461
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@ -1,3 +1,14 @@
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2011-11-21 Georg-Johann Lay <avr@gjlay.de>
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PR target/49313
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* config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add _moddi3, _umoddi3.
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(LIB1ASMFUNCS): Add _divdi3, _udivdi3, _udivmod64, _negdi2.
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* config/avr/lib1funcs.S (wmov): New assembler macro.
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(__umoddi3, __udivdi3, __udivdi3_umoddi3): New functions.
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(__moddi3, __divdi3, __divdi3_moddi3): New functions.
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(__udivmod64): New function.
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(__negdi2): New function.
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2011-11-21 Gerald Pfeifer <gerald@pfeifer.com>
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* config.host (*-*-freebsd[12], *-*-freebsd[12].*,
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@ -61,6 +61,15 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#endif
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.endm
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.macro wmov r_dest, r_src
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#if defined (__AVR_HAVE_MOVW__)
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movw \r_dest, \r_src
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#else
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mov \r_dest, \r_src
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mov \r_dest+1, \r_src+1
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#endif
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.endm
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#if defined (__AVR_HAVE_JMP_CALL__)
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#define XCALL call
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#define XJMP jmp
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@ -846,6 +855,352 @@ __divmodsi4_exit:
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ENDF __divmodsi4
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#endif /* defined (L_divmodsi4) */
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/*******************************************************
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Division 64 / 64
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Modulo 64 % 64
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*******************************************************/
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;; Use Speed-optimized Version on "big" Devices, i.e. Devices with
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;; at least 16k of Program Memory. For smaller Devices, depend
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;; on MOVW.
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#if defined (__AVR_HAVE_JMP_CALL__)
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# define SPEED_DIV 8
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#elif defined (__AVR_HAVE_MOVW__)
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# define SPEED_DIV 16
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#else
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# define SPEED_DIV 0
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#endif
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;; A[0..7]: In: Dividend;
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;; Out: Quotient (T = 0)
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;; Out: Remainder (T = 1)
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#define A0 18
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#define A1 A0+1
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#define A2 A0+2
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#define A3 A0+3
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#define A4 A0+4
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#define A5 A0+5
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#define A6 A0+6
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#define A7 A0+7
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;; B[0..7]: In: Divisor; Out: Clobber
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#define B0 10
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#define B1 B0+1
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#define B2 B0+2
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#define B3 B0+3
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#define B4 B0+4
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#define B5 B0+5
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#define B6 B0+6
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#define B7 B0+7
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;; C[0..7]: Expand remainder; Out: Remainder (unused)
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#define C0 8
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#define C1 C0+1
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#define C2 30
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#define C3 C2+1
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#define C4 28
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#define C5 C4+1
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#define C6 26
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#define C7 C6+1
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;; Holds Signs during Division Routine
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#define SS __tmp_reg__
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;; Bit-Counter in Division Routine
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#define R_cnt __zero_reg__
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;; Scratch Register for Negation
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#define NN r31
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#if defined (L_udivdi3)
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;; R25:R18 = R24:R18 umod R17:R10
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;; Ordinary ABI-Function
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DEFUN __umoddi3
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set
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rjmp __udivdi3_umoddi3
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ENDF __umoddi3
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;; R25:R18 = R24:R18 udiv R17:R10
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;; Ordinary ABI-Function
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DEFUN __udivdi3
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clt
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ENDF __udivdi3
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DEFUN __udivdi3_umoddi3
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push C0
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push C1
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push C4
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push C5
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XCALL __udivmod64
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pop C5
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pop C4
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pop C1
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pop C0
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ret
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ENDF __udivdi3_umoddi3
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#endif /* L_udivdi3 */
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#if defined (L_udivmod64)
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;; Worker Routine for 64-Bit unsigned Quotient and Remainder Computation
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;; No Registers saved/restored; the Callers will take Care.
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;; Preserves B[] and T-flag
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;; T = 0: Compute Quotient in A[]
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;; T = 1: Compute Remainder in A[] and shift SS one Bit left
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DEFUN __udivmod64
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;; Clear Remainder (C6, C7 will follow)
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clr C0
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clr C1
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wmov C2, C0
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wmov C4, C0
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ldi C7, 64
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#if SPEED_DIV == 0 || SPEED_DIV == 16
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;; Initialize Loop-Counter
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mov R_cnt, C7
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wmov C6, C0
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#endif /* SPEED_DIV */
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#if SPEED_DIV == 8
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push A7
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clr C6
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1: ;; Compare shifted Devidend against Divisor
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;; If -- even after Shifting -- it is smaller...
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CP A7,B0 $ cpc C0,B1 $ cpc C1,B2 $ cpc C2,B3
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cpc C3,B4 $ cpc C4,B5 $ cpc C5,B6 $ cpc C6,B7
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brcc 2f
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;; ...then we can subtract it. Thus, it is legal to shift left
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$ mov C6,C5 $ mov C5,C4 $ mov C4,C3
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mov C3,C2 $ mov C2,C1 $ mov C1,C0 $ mov C0,A7
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mov A7,A6 $ mov A6,A5 $ mov A5,A4 $ mov A4,A3
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mov A3,A2 $ mov A2,A1 $ mov A1,A0 $ clr A0
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;; 8 Bits are done
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subi C7, 8
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brne 1b
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;; Shifted 64 Bits: A7 has traveled to C7
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pop C7
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;; Divisor is greater than Dividend. We have:
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;; A[] % B[] = A[]
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;; A[] / B[] = 0
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;; Thus, we can return immediately
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rjmp 5f
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2: ;; Initialze Bit-Counter with Number of Bits still to be performed
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mov R_cnt, C7
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;; Push of A7 is not needed because C7 is still 0
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pop C7
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clr C7
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#elif SPEED_DIV == 16
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;; Compare shifted Dividend against Divisor
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cp A7, B3
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cpc C0, B4
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cpc C1, B5
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cpc C2, B6
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cpc C3, B7
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brcc 2f
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;; Divisor is greater than shifted Dividen: We can shift the Dividend
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;; and it is still smaller than the Divisor --> Shift one 32-Bit Chunk
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wmov C2,A6 $ wmov C0,A4
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wmov A6,A2 $ wmov A4,A0
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wmov A2,C6 $ wmov A0,C4
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;; Set Bit Counter to 32
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lsr R_cnt
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2:
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#elif SPEED_DIV
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#error SPEED_DIV = ?
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#endif /* SPEED_DIV */
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;; The very Division + Remainder Routine
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3: ;; Left-shift Dividend...
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lsl A0 $ rol A1 $ rol A2 $ rol A3
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rol A4 $ rol A5 $ rol A6 $ rol A7
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;; ...into Remainder
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rol C0 $ rol C1 $ rol C2 $ rol C3
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rol C4 $ rol C5 $ rol C6 $ rol C7
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;; Compare Remainder and Divisor
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CP C0,B0 $ cpc C1,B1 $ cpc C2,B2 $ cpc C3,B3
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cpc C4,B4 $ cpc C5,B5 $ cpc C6,B6 $ cpc C7,B7
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brcs 4f
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;; Divisor fits into Remainder: Subtract it from Remainder...
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SUB C0,B0 $ sbc C1,B1 $ sbc C2,B2 $ sbc C3,B3
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sbc C4,B4 $ sbc C5,B5 $ sbc C6,B6 $ sbc C7,B7
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;; ...and set according Bit in the upcoming Quotient
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;; The Bit will travel to its final Position
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ori A0, 1
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4: ;; This Bit is done
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dec R_cnt
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brne 3b
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;; __zero_reg__ is 0 again
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;; T = 0: We are fine with the Quotient in A[]
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;; T = 1: Copy Remainder to A[]
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5: brtc 6f
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wmov A0, C0
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wmov A2, C2
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wmov A4, C4
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wmov A6, C6
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;; Move the Sign of the Result to SS.7
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lsl SS
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6: ret
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ENDF __udivmod64
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#endif /* L_udivmod64 */
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#if defined (L_divdi3)
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;; R25:R18 = R24:R18 mod R17:R10
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;; Ordinary ABI-Function
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DEFUN __moddi3
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set
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rjmp __divdi3_moddi3
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ENDF __moddi3
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;; R25:R18 = R24:R18 div R17:R10
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;; Ordinary ABI-Function
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DEFUN __divdi3
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clt
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ENDF __divdi3
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DEFUN __divdi3_moddi3
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#if SPEED_DIV
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mov r31, A7
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or r31, B7
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brmi 0f
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;; Both Signs are 0: the following Complexitiy is not needed
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XJMP __udivdi3_umoddi3
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#endif /* SPEED_DIV */
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0: ;; The Prologue
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;; Save Z = 12 Registers: Y, 17...8
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;; No Frame needed (X = 0)
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clr r26
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clr r27
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ldi r30, lo8(gs(1f))
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ldi r31, hi8(gs(1f))
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XJMP __prologue_saves__ + ((18 - 12) * 2)
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1: ;; SS.7 will contain the Sign of the Quotient (A.sign * B.sign)
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;; SS.6 will contain the Sign of the Remainder (A.sign)
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mov SS, A7
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asr SS
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;; Adjust Dividend's Sign as needed
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#if SPEED_DIV
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;; Compiling for Speed we know that at least one Sign must be < 0
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;; Thus, if A[] >= 0 then we know B[] < 0
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brpl 22f
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#else
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brpl 21f
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#endif /* SPEED_DIV */
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XCALL __negdi2
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;; Adjust Divisor's Sign and SS.7 as needed
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21: tst B7
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brpl 3f
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22: ldi NN, 1 << 7
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eor SS, NN
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ldi NN, -1
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com B4 $ com B5 $ com B6 $ com B7
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$ com B1 $ com B2 $ com B3
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NEG B0
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$ sbc B1,NN $ sbc B2,NN $ sbc B3,NN
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sbc B4,NN $ sbc B5,NN $ sbc B6,NN $ sbc B7,NN
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3: ;; Do the unsigned 64-Bit Division/Modulo (depending on T-flag)
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XCALL __udivmod64
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;; Adjust Result's Sign
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#ifdef __AVR_ERRATA_SKIP_JMP_CALL__
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tst SS
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brpl 4f
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#else
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sbrc SS, 7
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#endif /* __AVR_HAVE_JMP_CALL__ */
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XCALL __negdi2
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4: ;; Epilogue: Restore the Z = 12 Registers and return
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in r28, __SP_L__
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in r29, __SP_H__
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ldi r30, 12
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XJMP __epilogue_restores__ + ((18 - 12) * 2)
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ENDF __divdi3_moddi3
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#undef R_cnt
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#undef SS
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#undef NN
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#endif /* L_divdi3 */
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#if defined (L_negdi2)
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DEFUN __negdi2
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com A4 $ com A5 $ com A6 $ com A7
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$ com A1 $ com A2 $ com A3
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NEG A0
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$ sbci A1,-1 $ sbci A2,-1 $ sbci A3,-1
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sbci A4,-1 $ sbci A5,-1 $ sbci A6,-1 $ sbci A7,-1
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ret
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ENDF __negdi2
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#endif /* L_negdi2 */
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#undef C7
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#undef C6
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#undef C5
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#undef C4
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#undef C3
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#undef C2
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#undef C1
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#undef C0
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#undef B7
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#undef B6
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#undef B5
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#undef B4
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#undef B3
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#undef B2
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#undef B1
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#undef B0
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#undef A7
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#undef A6
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#undef A5
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#undef A4
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#undef A3
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#undef A2
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#undef A1
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#undef A0
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.section .text.libgcc.prologue, "ax", @progbits
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@ -854,6 +1209,7 @@ ENDF __divmodsi4
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**********************************/
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#if defined (L_prologue)
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;; This function does not clobber T-flag; 64-bit division relies on it
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DEFUN __prologue_saves__
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push r2
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push r3
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@ -15,6 +15,9 @@ LIB1ASMFUNCS = \
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_divmodpsi4 _udivmodpsi4 \
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_udivmodsi4 \
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_divmodsi4 \
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_divdi3 _udivdi3 \
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_udivmod64 \
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_negdi2 \
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_prologue \
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_epilogue \
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_exit \
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@ -50,6 +53,7 @@ LIB1ASMFUNCS = \
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_fmul _fmuls _fmulsu
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LIB2FUNCS_EXCLUDE = \
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_moddi3 _umoddi3 \
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_clz
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# We do not have the DF type.
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