aarch64.md (*extr_insv_lower_reg<mode>): Remove + from the read only register.
2014-07-26 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove + from the read only register. From-SVN: r213090
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2014-07-26 Andrew Pinski <apinski@cavium.com>
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* config/aarch64/aarch64.md (*extr_insv_lower_reg<mode>): Remove +
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from the read only register.
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2014-07-26 Richard Sandiford <rdsandiford@googlemail.com>
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2014-07-26 Richard Sandiford <rdsandiford@googlemail.com>
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* ira-costs.c (find_costs_and_classes): For -O0, use the best class
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* ira-costs.c (find_costs_and_classes): For -O0, use the best class
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@ -3390,7 +3390,7 @@
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[(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
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[(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r")
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(match_operand 1 "const_int_operand" "n")
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(match_operand 1 "const_int_operand" "n")
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(const_int 0))
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(const_int 0))
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(zero_extract:GPI (match_operand:GPI 2 "register_operand" "+r")
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(zero_extract:GPI (match_operand:GPI 2 "register_operand" "r")
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(match_dup 1)
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(match_dup 1)
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(match_operand 3 "const_int_operand" "n")))]
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(match_operand 3 "const_int_operand" "n")))]
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"!(UINTVAL (operands[1]) == 0
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"!(UINTVAL (operands[1]) == 0
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