xtensa-protos.h (xtensa_copy_incoming_a7): Update.
* config/xtensa/xtensa-protos.h (xtensa_copy_incoming_a7): Update. (init_cumulative_args): Likewise. (a7_overlap_mentioned_p): Delete prototype. * config/xtensa/xtensa.c (struct machine_function): Replace incoming_a7_copied field with need_a7_copy and vararg_a7 flags. Add set_frame_ptr_insn field. (xtensa_emit_move_sequence): Update call to xtensa_copy_incoming_a7. (xtensa_copy_incoming_a7): Rewrite to check need_a7_copy flag and check if the operand is an argument in a7. If so, copy a7 to a new pseudo at the function entry and replace the operand with the pseudo. (init_cumulative_args): Remove unused arguments. Add new "incoming" argument and record this flag in CUMULATIVE_ARGS. (function_arg): Remove result_mode and special-case code to handle arguments in a7. Instead, set need_a7_copy flag when there is an incoming argument in a7. (xtensa_expand_prologue): Remove code to search for set_frame_ptr insn and use the value recorded in cfun->machine->set_frame_ptr_insn. (xtensa_builtin_saveregs): Check for negative gp_left value. Set need_a7_copy and vararg_a7 flags. Use move_block_from_reg instead of special-case code. (a7_overlap_mentioned_p): Delete. * config/xtensa/xtensa.h (CUMULATIVE_ARGS): Add "incoming" flag. (INIT_CUMULATIVE_ARGS, INIT_CUMULATIVE_INCOMING_ARGS): Remove useless arguments to init_cumulative_args and pass "incoming" flag instead. (BLOCK_REG_PADDING): Delete. * config/xtensa/xtensa.md (movdi, movsf, movdf): Remove unnecessary checks for reload_in_progress and reload_completed. Update calls to xtensa_copy_incoming_a7. (ashlsi3): Rename existing insn to ashlsi3_internal. Add expander to call xtensa_copy_incoming_a7. From-SVN: r77583
This commit is contained in:
Bob Wilson
Bob Wilson
parent
99bee03ac2
commit
997b8b4d4c
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@ -1,3 +1,36 @@
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2004-02-09 Bob Wilson <bob.wilson@acm.org>
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* config/xtensa/xtensa-protos.h (xtensa_copy_incoming_a7): Update.
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(init_cumulative_args): Likewise.
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(a7_overlap_mentioned_p): Delete prototype.
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* config/xtensa/xtensa.c (struct machine_function): Replace
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incoming_a7_copied field with need_a7_copy and vararg_a7 flags.
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Add set_frame_ptr_insn field.
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(xtensa_emit_move_sequence): Update call to xtensa_copy_incoming_a7.
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(xtensa_copy_incoming_a7): Rewrite to check need_a7_copy flag and check
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if the operand is an argument in a7. If so, copy a7 to a new pseudo
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at the function entry and replace the operand with the pseudo.
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(init_cumulative_args): Remove unused arguments. Add new "incoming"
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argument and record this flag in CUMULATIVE_ARGS.
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(function_arg): Remove result_mode and special-case code to handle
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arguments in a7. Instead, set need_a7_copy flag when there is an
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incoming argument in a7.
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(xtensa_expand_prologue): Remove code to search for set_frame_ptr insn
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and use the value recorded in cfun->machine->set_frame_ptr_insn.
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(xtensa_builtin_saveregs): Check for negative gp_left value. Set
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need_a7_copy and vararg_a7 flags. Use move_block_from_reg instead of
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special-case code.
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(a7_overlap_mentioned_p): Delete.
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* config/xtensa/xtensa.h (CUMULATIVE_ARGS): Add "incoming" flag.
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(INIT_CUMULATIVE_ARGS, INIT_CUMULATIVE_INCOMING_ARGS): Remove useless
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arguments to init_cumulative_args and pass "incoming" flag instead.
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(BLOCK_REG_PADDING): Delete.
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* config/xtensa/xtensa.md (movdi, movsf, movdf): Remove unnecessary
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checks for reload_in_progress and reload_completed. Update calls to
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xtensa_copy_incoming_a7.
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(ashlsi3): Rename existing insn to ashlsi3_internal. Add expander
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to call xtensa_copy_incoming_a7.
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2004-02-09 DJ Delorie <dj@redhat.com>
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* config/i386/xm-djgpp.h (GCC_DRIVER_HOST_INITIALIZATION): No
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@ -68,14 +68,14 @@ extern int xtensa_expand_scc (rtx *);
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extern int xtensa_expand_block_move (rtx *);
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extern void xtensa_split_operand_pair (rtx *, enum machine_mode);
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extern int xtensa_emit_move_sequence (rtx *, enum machine_mode);
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extern bool xtensa_copy_incoming_a7 (rtx *, enum machine_mode);
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extern rtx xtensa_copy_incoming_a7 (rtx);
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extern void xtensa_emit_block_move (rtx *, rtx *, int);
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extern void xtensa_expand_nonlocal_goto (rtx *);
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extern void xtensa_emit_loop_end (rtx, rtx *);
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extern char *xtensa_emit_call (int, rtx *);
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#ifdef TREE_CODE
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extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx);
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extern void init_cumulative_args (CUMULATIVE_ARGS *, int);
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extern void xtensa_va_start (tree, rtx);
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extern rtx xtensa_va_arg (tree, tree);
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#endif /* TREE_CODE */
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@ -88,7 +88,6 @@ extern enum reg_class xtensa_preferred_reload_class (rtx, enum reg_class, int);
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extern enum reg_class xtensa_secondary_reload_class (enum reg_class,
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enum machine_mode, rtx,
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int);
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extern int a7_overlap_mentioned_p (rtx);
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#endif /* RTX_CODE */
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#ifdef TREE_CODE
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@ -91,7 +91,9 @@ const char *xtensa_st_opcodes[(int) MAX_MACHINE_MODE];
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struct machine_function GTY(())
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{
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int accesses_prev_frame;
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bool incoming_a7_copied;
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bool need_a7_copy;
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bool vararg_a7;
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rtx set_frame_ptr_insn;
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};
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/* Vector, indexed by hard register number, which contains 1 for a
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@ -1271,14 +1273,11 @@ xtensa_emit_move_sequence (rtx *operands, enum machine_mode mode)
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}
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}
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if (!(reload_in_progress | reload_completed))
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{
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if (!xtensa_valid_move (mode, operands))
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operands[1] = force_reg (mode, operands[1]);
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if (!(reload_in_progress | reload_completed)
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&& !xtensa_valid_move (mode, operands))
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operands[1] = force_reg (mode, operands[1]);
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if (xtensa_copy_incoming_a7 (operands, mode))
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return 1;
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}
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operands[1] = xtensa_copy_incoming_a7 (operands[1]);
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/* During reload we don't want to emit (subreg:X (mem:Y)) since that
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instruction won't be recognized after reload, so we remove the
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@ -1309,89 +1308,114 @@ fixup_subreg_mem (rtx x)
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}
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/* Check if this move is copying an incoming argument in a7. If so,
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emit the move, followed by the special "set_frame_ptr"
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unspec_volatile insn, at the very beginning of the function. This
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is necessary because the register allocator will ignore conflicts
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with a7 and may assign some other pseudo to a7. If that pseudo was
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assigned prior to this move, it would clobber the incoming argument
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in a7. By copying the argument out of a7 as the very first thing,
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and then immediately following that with an unspec_volatile to keep
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the scheduler away, we should avoid any problems. */
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/* Check if an incoming argument in a7 is expected to be used soon and
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if OPND is a register or register pair that includes a7. If so,
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create a new pseudo and copy a7 into that pseudo at the very
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beginning of the function, followed by the special "set_frame_ptr"
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unspec_volatile insn. The return value is either the original
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operand, if it is not a7, or the new pseudo containing a copy of
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the incoming argument. This is necessary because the register
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allocator will ignore conflicts with a7 and may either assign some
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other pseudo to a7 or use a7 as the hard_frame_pointer, clobbering
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the incoming argument in a7. By copying the argument out of a7 as
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the very first thing, and then immediately following that with an
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unspec_volatile to keep the scheduler away, we should avoid any
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problems. Putting the set_frame_ptr insn at the beginning, with
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only the a7 copy before it, also makes it easier for the prologue
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expander to initialize the frame pointer after the a7 copy and to
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fix up the a7 copy to use the stack pointer instead of the frame
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pointer. */
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bool
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xtensa_copy_incoming_a7 (rtx *operands, enum machine_mode mode)
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rtx
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xtensa_copy_incoming_a7 (rtx opnd)
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{
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if (a7_overlap_mentioned_p (operands[1])
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&& !cfun->machine->incoming_a7_copied)
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rtx entry_insns = 0;
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rtx reg, tmp;
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enum machine_mode mode;
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if (!cfun->machine->need_a7_copy)
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return opnd;
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/* This function should never be called again once a7 has been copied. */
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if (cfun->machine->set_frame_ptr_insn)
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abort ();
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mode = GET_MODE (opnd);
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/* The operand using a7 may come in a later instruction, so just return
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the original operand if it doesn't use a7. */
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reg = opnd;
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if (GET_CODE (reg) == SUBREG)
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{
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rtx mov, src;
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if (SUBREG_BYTE (reg) != 0)
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abort ();
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reg = SUBREG_REG (reg);
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}
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if (GET_CODE (reg) != REG
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|| REGNO (reg) > A7_REG
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|| REGNO (reg) + HARD_REGNO_NREGS (A7_REG, mode) <= A7_REG)
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return opnd;
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/* Despite defining SPLIT_COMPLEX_ARGS, complex function
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arguments may still appear if they are wrapped in a struct.
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For CQImode and CHImode arguments, this results in a move
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with a source operand of the form: "(subreg:SI (reg:CHI a7)
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0)". The subreg is later removed by the reload pass,
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resulting in the RTL for a7 being regenerated using
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hard_frame_pointer_rtx, and making it impossible for us to
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distinguish the function argument. Detect this here when
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generating the RTL and remove the subreg immediately so that
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reload won't mess it up. */
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src = operands[1];
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if (GET_CODE (src) == SUBREG
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&& GET_CODE (SUBREG_REG (src)) == REG
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&& REGNO (SUBREG_REG (src)) == A7_REG
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&& SUBREG_BYTE (src) == 0
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&& (GET_MODE (SUBREG_REG (src)) == CHImode
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|| GET_MODE (SUBREG_REG (src)) == CQImode))
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operands[1] = gen_raw_REG (mode, A7_REG);
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/* 1-word args will always be in a7; 2-word args in a6/a7. */
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if (REGNO (reg) + HARD_REGNO_NREGS (A7_REG, mode) - 1 != A7_REG)
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abort ();
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switch (mode)
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{
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case DFmode:
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mov = gen_movdf_internal (operands[0], operands[1]);
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break;
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case SFmode:
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mov = gen_movsf_internal (operands[0], operands[1]);
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break;
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case DImode:
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mov = gen_movdi_internal (operands[0], operands[1]);
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break;
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case SImode:
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mov = gen_movsi_internal (operands[0], operands[1]);
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break;
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case HImode:
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mov = gen_movhi_internal (operands[0], operands[1]);
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break;
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case QImode:
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mov = gen_movqi_internal (operands[0], operands[1]);
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break;
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default:
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abort ();
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}
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cfun->machine->need_a7_copy = false;
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/* Insert the instructions before any other argument copies.
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(The set_frame_ptr insn comes _after_ the move, so push it
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out first.) */
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push_topmost_sequence ();
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emit_insn_after (gen_set_frame_ptr (), get_insns ());
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emit_insn_after (mov, get_insns ());
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pop_topmost_sequence ();
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/* Copy a7 to a new pseudo at the function entry. Use gen_raw_REG to
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create the REG for a7 so that hard_frame_pointer_rtx is not used. */
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/* Ideally the incoming argument in a7 would only be copied
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once, since propagating a7 into the body of a function
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will almost certainly lead to errors. However, there is
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at least one harmless case (in GCSE) where the original
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copy from a7 is changed to copy into a new pseudo. Thus,
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we use a flag to only do this special treatment for the
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first copy of a7. */
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push_to_sequence (entry_insns);
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tmp = gen_reg_rtx (mode);
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cfun->machine->incoming_a7_copied = true;
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return 1;
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switch (mode)
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{
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case DFmode:
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case DImode:
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emit_insn (gen_movsi_internal (gen_rtx_SUBREG (SImode, tmp, 0),
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gen_rtx_REG (SImode, A7_REG - 1)));
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emit_insn (gen_movsi_internal (gen_rtx_SUBREG (SImode, tmp, 4),
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gen_raw_REG (SImode, A7_REG)));
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break;
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case SFmode:
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emit_insn (gen_movsf_internal (tmp, gen_raw_REG (mode, A7_REG)));
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break;
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case SImode:
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emit_insn (gen_movsi_internal (tmp, gen_raw_REG (mode, A7_REG)));
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break;
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case HImode:
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emit_insn (gen_movhi_internal (tmp, gen_raw_REG (mode, A7_REG)));
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break;
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case QImode:
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emit_insn (gen_movqi_internal (tmp, gen_raw_REG (mode, A7_REG)));
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break;
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default:
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abort ();
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}
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return 0;
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cfun->machine->set_frame_ptr_insn = emit_insn (gen_set_frame_ptr ());
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entry_insns = get_insns ();
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end_sequence ();
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if (cfun->machine->vararg_a7)
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{
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/* This is called from within builtin_savereg, so we're already
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inside a start_sequence that will be placed at the start of
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the function. */
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emit_insn (entry_insns);
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}
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else
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{
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/* Put entry_insns after the NOTE that starts the function. If
|
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this is inside a start_sequence, make the outer-level insn
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chain current, so the code is placed at the start of the
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function. */
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push_topmost_sequence ();
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emit_insn_after (entry_insns, get_insns ());
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pop_topmost_sequence ();
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}
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return tmp;
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}
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@ -1727,11 +1751,10 @@ xtensa_dbx_register_number (int regno)
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/* Initialize CUMULATIVE_ARGS for a function. */
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void
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init_cumulative_args (CUMULATIVE_ARGS *cum,
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tree fntype ATTRIBUTE_UNUSED,
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rtx libname ATTRIBUTE_UNUSED)
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init_cumulative_args (CUMULATIVE_ARGS *cum, int incoming)
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{
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cum->arg_words = 0;
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cum->incoming = incoming;
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}
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@ -1768,7 +1791,6 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
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int regbase, words, max;
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int *arg_words;
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int regno;
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enum machine_mode result_mode;
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arg_words = &cum->arg_words;
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regbase = (incoming_p ? GP_ARG_FIRST : GP_OUTGOING_ARG_FIRST);
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@ -1785,37 +1807,11 @@ function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
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return (rtx)0;
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regno = regbase + *arg_words;
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result_mode = (mode == BLKmode ? TYPE_MODE (type) : mode);
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/* We need to make sure that references to a7 are represented with
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rtx that is not equal to hard_frame_pointer_rtx. For multi-word
|
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modes for which we don't define move patterns, we can't control
|
||||
the expansion unless we explicitly list the individual registers
|
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in a PARALLEL. Likewise, a single-word BLKmode argument passed
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in a7 must be wrapped in a PARALLEL to avoid code that takes the
|
||||
register number and builds a new REG. This is extremely fragile
|
||||
but seems to be the best solution for now. */
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if (cum->incoming && regno <= A7_REG && regno + words > A7_REG)
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cfun->machine->need_a7_copy = true;
|
||||
|
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if ((mode != DImode && mode != DFmode
|
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&& regno < A7_REG
|
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&& regno + words > A7_REG)
|
||||
|| (mode == BLKmode && regno == A7_REG))
|
||||
{
|
||||
rtx result;
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int n;
|
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|
||||
result = gen_rtx_PARALLEL (result_mode, rtvec_alloc (words));
|
||||
for (n = 0; n < words; n++)
|
||||
{
|
||||
XVECEXP (result, 0, n) =
|
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gen_rtx_EXPR_LIST (VOIDmode,
|
||||
gen_raw_REG (SImode, regno + n),
|
||||
GEN_INT (n * UNITS_PER_WORD));
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
return gen_raw_REG (result_mode, regno);
|
||||
return gen_rtx_REG (mode, regno);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -2264,41 +2260,18 @@ xtensa_expand_prologue (void)
|
|||
|
||||
if (frame_pointer_needed)
|
||||
{
|
||||
rtx first, insn, set_frame_ptr_insn = 0;
|
||||
|
||||
push_topmost_sequence ();
|
||||
first = get_insns ();
|
||||
pop_topmost_sequence ();
|
||||
|
||||
/* Search all instructions, looking for the insn that sets up the
|
||||
frame pointer. This search will fail if the function does not
|
||||
have an incoming argument in $a7, but in that case, we can just
|
||||
set up the frame pointer at the very beginning of the
|
||||
function. */
|
||||
|
||||
for (insn = first; insn; insn = NEXT_INSN (insn))
|
||||
if (cfun->machine->set_frame_ptr_insn)
|
||||
{
|
||||
rtx pat;
|
||||
rtx first, insn;
|
||||
|
||||
if (!INSN_P (insn))
|
||||
continue;
|
||||
push_topmost_sequence ();
|
||||
first = get_insns ();
|
||||
pop_topmost_sequence ();
|
||||
|
||||
pat = PATTERN (insn);
|
||||
if (GET_CODE (pat) == SET
|
||||
&& GET_CODE (SET_SRC (pat)) == UNSPEC_VOLATILE
|
||||
&& (XINT (SET_SRC (pat), 1) == UNSPECV_SET_FP))
|
||||
{
|
||||
set_frame_ptr_insn = insn;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (set_frame_ptr_insn)
|
||||
{
|
||||
/* For all instructions prior to set_frame_ptr_insn, replace
|
||||
hard_frame_pointer references with stack_pointer. */
|
||||
for (insn = first;
|
||||
insn != set_frame_ptr_insn;
|
||||
insn != cfun->machine->set_frame_ptr_insn;
|
||||
insn = NEXT_INSN (insn))
|
||||
{
|
||||
if (INSN_P (insn))
|
||||
|
|
@ -2400,9 +2373,8 @@ xtensa_builtin_saveregs (void)
|
|||
rtx gp_regs, dest;
|
||||
int arg_words = current_function_arg_words;
|
||||
int gp_left = MAX_ARGS_IN_REGISTERS - arg_words;
|
||||
int i;
|
||||
|
||||
if (gp_left == 0)
|
||||
if (gp_left <= 0)
|
||||
return const0_rtx;
|
||||
|
||||
/* Allocate the general-purpose register space. */
|
||||
|
|
@ -2414,16 +2386,9 @@ xtensa_builtin_saveregs (void)
|
|||
dest = change_address (gp_regs, SImode,
|
||||
plus_constant (XEXP (gp_regs, 0),
|
||||
arg_words * UNITS_PER_WORD));
|
||||
|
||||
/* Note: Don't use move_block_from_reg() here because the incoming
|
||||
argument in a7 cannot be represented by hard_frame_pointer_rtx.
|
||||
Instead, call gen_raw_REG() directly so that we get a distinct
|
||||
instance of (REG:SI 7). */
|
||||
for (i = 0; i < gp_left; i++)
|
||||
{
|
||||
emit_move_insn (operand_subword (dest, i, 1, BLKmode),
|
||||
gen_raw_REG (SImode, GP_ARG_FIRST + arg_words + i));
|
||||
}
|
||||
cfun->machine->need_a7_copy = true;
|
||||
cfun->machine->vararg_a7 = true;
|
||||
move_block_from_reg (GP_ARG_FIRST + arg_words, dest, gp_left);
|
||||
|
||||
return XEXP (gp_regs, 0);
|
||||
}
|
||||
|
|
@ -2749,55 +2714,6 @@ order_regs_for_local_alloc (void)
|
|||
}
|
||||
|
||||
|
||||
/* A customized version of reg_overlap_mentioned_p that only looks for
|
||||
references to a7 (as opposed to hard_frame_pointer_rtx). */
|
||||
|
||||
int
|
||||
a7_overlap_mentioned_p (rtx x)
|
||||
{
|
||||
int i, j;
|
||||
unsigned int x_regno;
|
||||
const char *fmt;
|
||||
|
||||
if (GET_CODE (x) == REG)
|
||||
{
|
||||
x_regno = REGNO (x);
|
||||
return (x != hard_frame_pointer_rtx
|
||||
&& x_regno < A7_REG + 1
|
||||
&& x_regno + HARD_REGNO_NREGS (A7_REG, GET_MODE (x)) > A7_REG);
|
||||
}
|
||||
|
||||
if (GET_CODE (x) == SUBREG
|
||||
&& GET_CODE (SUBREG_REG (x)) == REG
|
||||
&& REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
|
||||
{
|
||||
x_regno = subreg_regno (x);
|
||||
return (SUBREG_REG (x) != hard_frame_pointer_rtx
|
||||
&& x_regno < A7_REG + 1
|
||||
&& x_regno + HARD_REGNO_NREGS (A7_REG, GET_MODE (x)) > A7_REG);
|
||||
}
|
||||
|
||||
/* X does not match, so try its subexpressions. */
|
||||
fmt = GET_RTX_FORMAT (GET_CODE (x));
|
||||
for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
|
||||
{
|
||||
if (fmt[i] == 'e')
|
||||
{
|
||||
if (a7_overlap_mentioned_p (XEXP (x, i)))
|
||||
return 1;
|
||||
}
|
||||
else if (fmt[i] == 'E')
|
||||
{
|
||||
for (j = XVECLEN (x, i) - 1; j >=0; j--)
|
||||
if (a7_overlap_mentioned_p (XVECEXP (x, i, j)))
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
/* Some Xtensa targets support multiple bss sections. If the section
|
||||
name ends with ".bss", add SECTION_BSS to the flags. */
|
||||
|
||||
|
|
|
|||
|
|
@ -736,23 +736,21 @@ extern enum reg_class xtensa_char_to_class[256];
|
|||
#define FUNCTION_ARG_REGNO_P(N) \
|
||||
((N) >= GP_OUTGOING_ARG_FIRST && (N) <= GP_OUTGOING_ARG_LAST)
|
||||
|
||||
/* Define a data type for recording info about an argument list
|
||||
during the scan of that argument list. This data type should
|
||||
hold all necessary information about the function itself
|
||||
and about the args processed so far, enough to enable macros
|
||||
such as FUNCTION_ARG to determine where the next arg should go. */
|
||||
typedef struct xtensa_args {
|
||||
int arg_words; /* # total words the arguments take */
|
||||
/* Record the number of argument words seen so far, along with a flag to
|
||||
indicate whether these are incoming arguments. (FUNCTION_INCOMING_ARG
|
||||
is used for both incoming and outgoing args, so a separate flag is
|
||||
needed. */
|
||||
typedef struct xtensa_args
|
||||
{
|
||||
int arg_words;
|
||||
int incoming;
|
||||
} CUMULATIVE_ARGS;
|
||||
|
||||
/* Initialize a variable CUM of type CUMULATIVE_ARGS
|
||||
for a call to a function whose data type is FNTYPE.
|
||||
For a library call, FNTYPE is 0. */
|
||||
#define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
|
||||
init_cumulative_args (&CUM, FNTYPE, LIBNAME)
|
||||
init_cumulative_args (&CUM, 0)
|
||||
|
||||
#define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
|
||||
init_cumulative_args (&CUM, FNTYPE, LIBNAME)
|
||||
init_cumulative_args (&CUM, 1)
|
||||
|
||||
/* Update the data in CUM to advance over an argument
|
||||
of mode MODE and data type TYPE.
|
||||
|
|
@ -798,12 +796,6 @@ typedef struct xtensa_args {
|
|||
/* Pass complex arguments independently. */
|
||||
#define SPLIT_COMPLEX_ARGS 1
|
||||
|
||||
/* Because Xtensa's function_arg() wraps BLKmode arguments passed in
|
||||
a7 inside a PARALLEL, BLOCK_REG_PADDING needs to be defined
|
||||
to get emit_group_store to do the right thing. */
|
||||
#define BLOCK_REG_PADDING(MODE, TYPE, FIRST) \
|
||||
FUNCTION_ARG_PADDING (MODE, TYPE)
|
||||
|
||||
/* Profiling Xtensa code is typically done with the built-in profiling
|
||||
feature of Tensilica's instruction set simulator, which does not
|
||||
require any compiler support. Profiling code on a real (i.e.,
|
||||
|
|
@ -1142,11 +1134,6 @@ typedef struct xtensa_args {
|
|||
/* Prefer word-sized loads. */
|
||||
#define SLOW_BYTE_ACCESS 1
|
||||
|
||||
/* ??? Xtensa doesn't have any instructions that set integer values
|
||||
based on the results of comparisons, but the simplification code in
|
||||
the combiner also uses STORE_FLAG_VALUE. The default value (1) is
|
||||
fine for us, but (-1) might be better. */
|
||||
|
||||
/* Shift instructions ignore all but the low-order few bits. */
|
||||
#define SHIFT_COUNT_TRUNCATED 1
|
||||
|
||||
|
|
|
|||
|
|
@ -803,15 +803,11 @@
|
|||
if (CONSTANT_P (operands[1]) && !TARGET_CONST16)
|
||||
operands[1] = force_const_mem (DImode, operands[1]);
|
||||
|
||||
if (!(reload_in_progress | reload_completed))
|
||||
{
|
||||
if (!register_operand (operands[0], DImode)
|
||||
&& !register_operand (operands[1], DImode))
|
||||
operands[1] = force_reg (DImode, operands[1]);
|
||||
if (!register_operand (operands[0], DImode)
|
||||
&& !register_operand (operands[1], DImode))
|
||||
operands[1] = force_reg (DImode, operands[1]);
|
||||
|
||||
if (xtensa_copy_incoming_a7 (operands, DImode))
|
||||
DONE;
|
||||
}
|
||||
operands[1] = xtensa_copy_incoming_a7 (operands[1]);
|
||||
})
|
||||
|
||||
(define_insn_and_split "movdi_internal"
|
||||
|
|
@ -934,18 +930,15 @@
|
|||
if (!TARGET_CONST16 && CONSTANT_P (operands[1]))
|
||||
operands[1] = force_const_mem (SFmode, operands[1]);
|
||||
|
||||
if (!(reload_in_progress | reload_completed))
|
||||
{
|
||||
if ((!register_operand (operands[0], SFmode)
|
||||
&& !register_operand (operands[1], SFmode))
|
||||
|| (FP_REG_P (xt_true_regnum (operands[0]))
|
||||
&& (constantpool_mem_p (operands[1])
|
||||
|| CONSTANT_P (operands[1]))))
|
||||
operands[1] = force_reg (SFmode, operands[1]);
|
||||
if ((!register_operand (operands[0], SFmode)
|
||||
&& !register_operand (operands[1], SFmode))
|
||||
|| (FP_REG_P (xt_true_regnum (operands[0]))
|
||||
&& !(reload_in_progress | reload_completed)
|
||||
&& (constantpool_mem_p (operands[1])
|
||||
|| CONSTANT_P (operands[1]))))
|
||||
operands[1] = force_reg (SFmode, operands[1]);
|
||||
|
||||
if (xtensa_copy_incoming_a7 (operands, SFmode))
|
||||
DONE;
|
||||
}
|
||||
operands[1] = xtensa_copy_incoming_a7 (operands[1]);
|
||||
})
|
||||
|
||||
(define_insn "movsf_internal"
|
||||
|
|
@ -1015,15 +1008,11 @@
|
|||
if (CONSTANT_P (operands[1]) && !TARGET_CONST16)
|
||||
operands[1] = force_const_mem (DFmode, operands[1]);
|
||||
|
||||
if (!(reload_in_progress | reload_completed))
|
||||
{
|
||||
if (!register_operand (operands[0], DFmode)
|
||||
&& !register_operand (operands[1], DFmode))
|
||||
operands[1] = force_reg (DFmode, operands[1]);
|
||||
if (!register_operand (operands[0], DFmode)
|
||||
&& !register_operand (operands[1], DFmode))
|
||||
operands[1] = force_reg (DFmode, operands[1]);
|
||||
|
||||
if (xtensa_copy_incoming_a7 (operands, DFmode))
|
||||
DONE;
|
||||
}
|
||||
operands[1] = xtensa_copy_incoming_a7 (operands[1]);
|
||||
})
|
||||
|
||||
(define_insn_and_split "movdf_internal"
|
||||
|
|
@ -1081,7 +1070,16 @@
|
|||
|
||||
;; Shift instructions.
|
||||
|
||||
(define_insn "ashlsi3"
|
||||
(define_expand "ashlsi3"
|
||||
[(set (match_operand:SI 0 "register_operand" "")
|
||||
(ashift:SI (match_operand:SI 1 "register_operand" "")
|
||||
(match_operand:SI 2 "arith_operand" "")))]
|
||||
""
|
||||
{
|
||||
operands[1] = xtensa_copy_incoming_a7 (operands[1]);
|
||||
})
|
||||
|
||||
(define_insn "ashlsi3_internal"
|
||||
[(set (match_operand:SI 0 "register_operand" "=a,a")
|
||||
(ashift:SI (match_operand:SI 1 "register_operand" "r,r")
|
||||
(match_operand:SI 2 "arith_operand" "J,r")))]
|
||||
|
|
|
|||
Loading…
Reference in New Issue