cris: Add new pass eliminating compares after delay-slot-filling
Delayed-branch-slot-filling a.k.a. reorg or dbr, often causes opportunities for more compare-elimination than were visible for the cmpelim pass. With cc0, these were caught by the elimination pass run in "final", thus the missed opportunities is a regression. A simple reorg-aware pass run just after reorg handles most of them, if not all. I chose to keep the "mach2" pass identifier string I copy-pasted from the SPARC port instead of inventing one like "postdbr_cmpelim". Note the gap in numbers in the test-case file names. gcc: PR target/93372 * config/cris/cris-passes.def: New file. * config/cris/t-cris (PASSES_EXTRA): Add cris-passes.def. * config/cris/cris.c: Add infrastructure bits and pass execute function cris_postdbr_cmpelim. * config/cris/cris-protos.h (make_pass_cris_postdbr_cmpelim): Declare. gcc/testsuite: * gcc.target/cris/pr93372-44.c, gcc.target/cris/pr93372-46.c: New.
This commit is contained in:
Hans-Peter Nilsson
parent
881fb2091c
commit
9a2ae08b02
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@ -0,0 +1,20 @@
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/* Description of target passes for Visium.
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Copyright (C) 2020 Free Software Foundation, Inc.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it under
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the terms of the GNU General Public License as published by the Free
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Software Foundation; either version 3, or (at your option) any later
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version.
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GCC is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License
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along with GCC; see the file COPYING3. If not see
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<http://www.gnu.org/licenses/>. */
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INSERT_PASS_AFTER (pass_delay_slots, 1, pass_cris_postdbr_cmpelim);
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@ -60,3 +60,5 @@ extern int cris_fatal (char *);
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extern int cris_initial_elimination_offset (int, int);
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extern void cris_init_expanders (void);
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extern rtl_opt_pass *make_pass_cris_postdbr_cmpelim (gcc::context *);
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@ -51,6 +51,8 @@ along with GCC; see the file COPYING3. If not see
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#include "output.h"
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#include "tm-constrs.h"
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#include "builtins.h"
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#include "cfgrtl.h"
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#include "tree-pass.h"
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/* This file should be included last. */
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#include "target-def.h"
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@ -129,6 +131,8 @@ static void cris_asm_output_mi_thunk
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static void cris_file_start (void);
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static void cris_init_libfuncs (void);
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static unsigned int cris_postdbr_cmpelim (void);
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static reg_class_t cris_preferred_reload_class (rtx, reg_class_t);
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static int cris_register_move_cost (machine_mode, reg_class_t, reg_class_t);
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@ -298,6 +302,204 @@ int cris_cpu_version = CRIS_DEFAULT_CPU_VERSION;
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struct gcc_target targetm = TARGET_INITIALIZER;
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namespace {
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const pass_data pass_data_cris_postdbr_cmpelim =
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{
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RTL_PASS, /* type */
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"mach2", /* name */
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OPTGROUP_NONE, /* optinfo_flags */
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TV_MACH_DEP, /* tv_id */
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0, /* properties_required */
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0, /* properties_provided */
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0, /* properties_destroyed */
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0, /* todo_flags_start */
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0, /* todo_flags_finish */
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};
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class pass_cris_postdbr_cmpelim : public rtl_opt_pass
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{
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public:
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pass_cris_postdbr_cmpelim (gcc::context *ctxt)
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: rtl_opt_pass (pass_data_cris_postdbr_cmpelim, ctxt)
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{}
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/* opt_pass methods: */
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virtual unsigned int execute (function *)
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{
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return cris_postdbr_cmpelim ();
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}
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/* No use running this if reorg and cmpelim aren't both run. */
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virtual bool gate (function *)
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{
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return
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optimize > 0
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&& flag_delayed_branch
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&& flag_compare_elim_after_reload;
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}
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};
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} // anon namespace
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rtl_opt_pass *
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make_pass_cris_postdbr_cmpelim (gcc::context *ctxt)
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{
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return new pass_cris_postdbr_cmpelim (ctxt);
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}
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/* "Cheap version" of cmpelim, making use of the opportunities opened up
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by reorg.
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Go through the insns of a function and look at each actual compare
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insn; considering only those that compare a register to 0. If the
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previous CC-affecting insn sets the compared register or if a move
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reads from it, try to change that into a CC-setting move and try to
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have it recognized. Bail at labels or non-matching insns that
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clobber the compared register. If successful, delete the compare.
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Also, reorg isn't up to date regarding data-flow handling, so we
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can't go beyond classic RTL scanning. */
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static unsigned int
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cris_postdbr_cmpelim ()
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{
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rtx_insn *insn;
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rtx_insn *next;
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rtx_insn *prev_cc_setter = 0;
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rtx_insn *prev_cc_outer = 0;
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rtx dccr = gen_rtx_REG (CCmode, CRIS_CC0_REGNUM);
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/* Now look for compares in the insn stream. */
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for (insn = get_insns (); insn; insn = next)
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{
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rtx_insn *outer_insn = insn;
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rtx pat = PATTERN (insn);
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next = NEXT_INSN (outer_insn);
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/* Forget previous state when we see a label; we can't track or
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merge its state. */
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if (LABEL_P (insn))
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{
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prev_cc_setter = 0;
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continue;
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}
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if (!NONDEBUG_INSN_P (insn))
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continue;
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/* Consider filled delay slots; there might be a comparison there.
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It's only the second insn in a sequence that is interesting. */
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if (GET_CODE (pat) == SEQUENCE)
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insn = as_a <rtx_insn *> XVECEXP (pat, 0, 1);
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/* The "else" eliminates temptations to consider an insn in a
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delay slot for elimination; it can only be a prev_cc_setter. */
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else if (prev_cc_setter != 0 && GET_CODE (pat) == SET)
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{
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rtx dest = SET_DEST (pat);
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rtx src = SET_SRC (pat);
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rtx prev_set;
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if (REG_P (dest)
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&& REGNO (dest) == CRIS_CC0_REGNUM
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&& GET_CODE (src) == COMPARE
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&& REG_P (XEXP (src, 0))
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&& XEXP (src, 1) == const0_rtx
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&& (prev_set = single_set (prev_cc_setter)) != 0)
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{
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/* We have a candidate, and a prev_cc_setter to inspect. */
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rtx reg = XEXP (src, 0);
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rtx prev_dest = SET_DEST (prev_set);
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rtx prev_src = SET_SRC (prev_set);
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bool src_same = rtx_equal_p (prev_src, reg);
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/* If the prev_cc_setter isn't a simple SET, or if the
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compared register is modified in prev_cc_setter without
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being the destination, or if it's modified between
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prev_cc_setter (equal to or contained in prev_cc_outer)
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and this insn, then we can't use the flags result. And
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of course, the SET_DEST of prev_cc_setter (the main
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interest, not dccr) has to be the same register and
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mode we're interested in - or the SET_SRC. We've
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already checked that the compared register isn't
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changed in-between. */
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if (REG_P (prev_dest)
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&& ! reg_set_p (reg, prev_src)
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&& ! reg_set_between_p (reg, prev_cc_outer, outer_insn)
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&& (src_same || rtx_equal_p (prev_dest, reg)))
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{
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machine_mode ccmode = GET_MODE (src);
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rtx modeadjusted_dccr
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= (ccmode == CCmode ? dccr
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: gen_rtx_REG (CCmode, CRIS_CC0_REGNUM));
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rtx compare
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/* We don't need to copy_rtx pat: we're going to
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delete that insn. */
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= (src_same ? pat
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: gen_rtx_SET (modeadjusted_dccr,
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gen_rtx_COMPARE (ccmode,
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copy_rtx (prev_src),
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const0_rtx)));
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/* Replace tentatively, the prev_set combo that is
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((set d s) (clobber dccr)) with
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((cmp s 0) (set d s)) where (cmp s 0) is the
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compare we're looking at, and validate it or fail
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the whole thing. First replace the ((set d s) ...)
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with ((cmp s 0) ...)). */
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validate_change (prev_cc_setter,
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&XVECEXP (PATTERN (prev_cc_setter),
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0, 0), compare, true);
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/* Then the clobber with the (set d s). */
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validate_change (prev_cc_setter,
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&XVECEXP (PATTERN (prev_cc_setter),
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0, 1), prev_set, true);
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if (apply_change_group ())
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{
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delete_insn (insn);
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/* We eliminated the compare. Then we must go to
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the next insn: we can't consider the eliminated
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insn for the next prev_cc_setter.
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FIXME: if later insns still match, we could do
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the delete_insn part only, for them. But, it
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seems rare that reorg would manage to move a
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second CC-clobber to another delay-slot,
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leaving two identical compares (and presumably
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users). */
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prev_cc_setter = 0;
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continue;
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}
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}
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}
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}
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if (reg_set_p (dccr, insn))
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{
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rtx pat = PATTERN (insn);
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prev_cc_setter = 0;
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/* Make sure we can use it later on, otherwise forget it.
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Don't look too close, we're going to pass a lot of these.
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Just make sure the structure is that we can work with. */
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if (GET_CODE (pat) == PARALLEL
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&& XVECLEN (pat, 0) == 2
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&& GET_CODE (XVECEXP (pat, 0, 1)) == CLOBBER)
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{
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prev_cc_setter = insn;
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prev_cc_outer = outer_insn;
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}
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}
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}
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return 0;
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}
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/* Helper for cris_load_multiple_op and cris_ret_movem_op. */
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bool
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@ -24,3 +24,5 @@
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# The makefile macros etc. are included in the order found in the
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# section "Target Fragment" in the gcc info-files (or the paper copy) of
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# "Using and Porting GCC"
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PASSES_EXTRA += $(srcdir)/config/cris/cris-passes.def
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@ -0,0 +1,13 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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/* { dg-final { scan-assembler-not {\tcmp|\ttest} } } */
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extern void foo(void);
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unsigned int x (unsigned int a, unsigned int b, unsigned int *c)
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{
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unsigned int y = a & 15;
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unsigned int z = y + b;
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if (y == 0)
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*c = z;
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return z;
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}
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@ -0,0 +1,16 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -march=v10" } */
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/* { dg-final { scan-assembler-not {\tnop} } } */
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/* { dg-final { scan-assembler-times {\tcmp|\ttest|\tmove.d \$r10,\$r} 1 } } */
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/* We either have a move from "a" to some other register or a compare. */
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extern void foo(void);
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unsigned int x (unsigned int a, unsigned int b, unsigned int *c, unsigned int *d)
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{
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unsigned int z = __builtin_clz(b);
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if (a != 0)
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*c = a;
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*d = a;
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return z;
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}
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