sh.h (REG_CLASS_HAS_GENERAL_REG): Only true for SIBCALL_REGS if not TARGET_SHMEDIA.
* sh.h (REG_CLASS_HAS_GENERAL_REG): Only true for SIBCALL_REGS if not TARGET_SHMEDIA. From-SVN: r60045
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@ -1,3 +1,19 @@
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Wed Dec 11 20:15:19 2002 J"orn Rennecke <joern.rennecke@superh.com>
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* sh.h (REG_CLASS_HAS_GENERAL_REG): Only true for SIBCALL_REGS
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if not TARGET_SHMEDIA.
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Wed Dec 11 19:05:05 2002 J"orn Rennecke <joern.rennecke@superh.com>
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* sh.h (REG_CLASS_HAS_FP_REG): New.
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(REGISTER_MOVE_COST) Use it. Put body into a function and
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move it into:
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* sh.c (sh_register_move_cost).
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* sh-protos.h (sh_register_move_cost): Declare.
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* sh.c (sh_expand_builtin): Abort for unexpected nop values.
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(sh_adjust_cost): Always return a value.
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Wed Dec 11 18:39:52 2002 J"orn Rennecke <joern.rennecke@superh.com>
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* sh.h (REG_CLASS_HAS_GENERAL_REG): New.
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@ -2812,42 +2812,17 @@ while (0)
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it uses this information. Hence, the general register <-> floating point
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register information here is not used for SFmode. */
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#define REGCLASS_HAS_GENERAL_REG(rclass) \
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((rclass)==GENERAL_REGS||(rclass)==R0_REGS||(rclass)==SIBCALL_REGS)
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#define REGCLASS_HAS_GENERAL_REG(CLASS) \
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((CLASS) == GENERAL_REGS || (CLASS) == R0_REGS \
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|| (! TARGET_SHMEDIA && (CLASS) == SIBCALL_REGS))
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/* NB SIBCALL_REGS are not strictly general, as they include TR0-TR4 */
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#define REGCLASS_HAS_FP_REG(CLASS) \
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((CLASS) == FP0_REGS || (CLASS) == FP_REGS \
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|| (CLASS) == DF_REGS || (CLASS) == DF_HI_REGS)
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#define REGISTER_MOVE_COST(MODE, SRCCLASS, DSTCLASS) \
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(((((DSTCLASS) == T_REGS) || ((DSTCLASS) == PR_REGS)) ? 10 \
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: ((((DSTCLASS) == FP0_REGS || (DSTCLASS) == FP_REGS \
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|| (DSTCLASS) == DF_REGS || (DSTCLASS) == DF_HI_REGS) \
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&& REGCLASS_HAS_GENERAL_REG (SRCCLASS)) \
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|| (REGCLASS_HAS_GENERAL_REG (DSTCLASS) \
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&& ((SRCCLASS) == FP0_REGS || (SRCCLASS) == FP_REGS \
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|| (SRCCLASS) == DF_REGS || (SRCCLASS) == DF_HI_REGS))) \
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? (TARGET_SHMEDIA ? 4 \
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: TARGET_FMOVD ? 8 : 12) \
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: (((DSTCLASS) == FPUL_REGS \
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&& REGCLASS_HAS_GENERAL_REG (SRCCLASS)) \
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|| ((SRCCLASS) == FPUL_REGS \
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&& REGCLASS_HAS_GENERAL_REG (DSTCLASS))) \
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? 5 \
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: (((DSTCLASS) == FPUL_REGS \
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&& ((SRCCLASS) == PR_REGS || (SRCCLASS) == MAC_REGS \
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|| (SRCCLASS) == T_REGS)) \
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|| ((SRCCLASS) == FPUL_REGS \
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&& ((DSTCLASS) == PR_REGS || (DSTCLASS) == MAC_REGS))) \
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? 7 \
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: (((SRCCLASS) == TARGET_REGS \
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&& ! REGCLASS_HAS_GENERAL_REG (DSTCLASS)) \
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|| ((DSTCLASS) == TARGET_REGS \
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&& ! REGCLASS_HAS_GENERAL_REG (SRCCLASS))) \
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? 20 \
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: (((SRCCLASS) == FPSCR_REGS \
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&& ! REGCLASS_HAS_GENERAL_REG (DSTCLASS)) \
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|| ((DSTCLASS) == FPSCR_REGS \
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&& ! REGCLASS_HAS_GENERAL_REG (SRCCLASS))) \
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? 4 \
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: 2) * ((MODE) == V16SFmode ? 8 : (MODE) == V4SFmode ? 2 : 1))
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sh_register_move_cost ((MODE), (SRCCLASS), (DSTCLASS))
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/* ??? Perhaps make MEMORY_MOVE_COST depend on compiler option? This
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would be so that people with slow memory systems could generate
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