From 9abd1955da0d1717108ee06829f94a57908bcc38 Mon Sep 17 00:00:00 2001 From: Roger Sayle Date: Wed, 16 Mar 2005 18:29:26 +0000 Subject: [PATCH] optabs.c (expand_copysign_absneg): Make static. * optabs.c (expand_copysign_absneg): Make static. * optabs.h (expand_copysign_absneg): Delete prototype. * config/rs6000/rs6000.md (copysigntf3): Delete pattern. From-SVN: r96572 --- gcc/ChangeLog | 6 ++++++ gcc/config/rs6000/rs6000.md | 27 --------------------------- gcc/optabs.c | 2 +- gcc/optabs.h | 1 - 4 files changed, 7 insertions(+), 29 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d7b1f14df30..3978c1af56d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2005-03-16 Roger Sayle + + * optabs.c (expand_copysign_absneg): Make static. + * optabs.h (expand_copysign_absneg): Delete prototype. + * config/rs6000/rs6000.md (copysigntf3): Delete pattern. + 2005-03-16 Richard Henderson PR middle-end/15700 diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 17d81f24230..fc4b6f1cfb2 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8492,33 +8492,6 @@ operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word); operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word); }") - -(define_expand "copysigntf3" - [(match_operand:TF 0 "general_operand" "") - (match_operand:TF 1 "general_operand" "") - (match_operand:TF 2 "general_operand" "")] - "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) - && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128" -{ - rtx target, op0, op1, temp; - bool op0_is_abs = false; - - target = operands[0]; - op0 = operands[1]; - op1 = operands[2]; - - if (GET_CODE (op0) == CONST_DOUBLE) - { - if (real_isneg (CONST_DOUBLE_REAL_VALUE (op0))) - op0 = simplify_unary_operation (ABS, TFmode, op0, TFmode); - op0_is_abs = true; - } - - temp = expand_copysign_absneg (TFmode, op0, op1, target, 127, op0_is_abs); - if (temp != target) - emit_move_insn (target, temp); - DONE; -}) ;; Next come the multi-word integer load and store and the load and store ;; multiple insns. diff --git a/gcc/optabs.c b/gcc/optabs.c index ccbf67034d7..b2021f1d358 100644 --- a/gcc/optabs.c +++ b/gcc/optabs.c @@ -2678,7 +2678,7 @@ expand_abs (enum machine_mode mode, rtx op0, rtx target, is that we have a split register file, and leaving op0 in fp registers, and not playing with subregs so much, will help the register allocator. */ -rtx +static rtx expand_copysign_absneg (enum machine_mode mode, rtx op0, rtx op1, rtx target, int bitpos, bool op0_is_abs) { diff --git a/gcc/optabs.h b/gcc/optabs.h index e0a7985bc15..b9aa6ac4161 100644 --- a/gcc/optabs.h +++ b/gcc/optabs.h @@ -463,7 +463,6 @@ extern rtx expand_abs (enum machine_mode, rtx, rtx, int, int); /* Expand the copysign operation. */ extern rtx expand_copysign (rtx, rtx, rtx); -extern rtx expand_copysign_absneg (enum machine_mode, rtx, rtx, rtx, int, bool); /* Generate an instruction with a given INSN_CODE with an output and an input. */