sparc.h (CPP_SPEC): Handle -mcpu={sparclet,tsc701}.
* sparc/sparc.h (CPP_SPEC): Handle -mcpu={sparclet,tsc701}. (ASM_SPEC): Likewise. ({MASK,TARGET}_BROKEN_SAVERESTORE): Define. (enum processor_type): 90C701 renamed to TSC701. From-SVN: r11692
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@ -123,6 +123,7 @@ Unrecognized value in TARGET_CPU_DEFAULT.
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%{mf930:-D__sparclite__} %{mf934:-D__sparclite__} \
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%{mv8:-D__sparc_v8__} \
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%{msupersparc:-D__supersparc__ -D__sparc_v8__} \
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%{mcpu=sparclet:-D__sparclet__} %{mcpu=tsc701:-D__sparclet__} \
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%{mcpu=sparclite:-D__sparclite__} \
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%{mcpu=f930:-D__sparclite__} %{mcpu=f934:-D__sparclite__} \
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%{mcpu=v8:-D__sparc_v8__} \
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@ -163,6 +164,7 @@ Unrecognized value in TARGET_CPU_DEFAULT.
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/* Override in target specific files. */
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#define ASM_CPU_SPEC "\
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%{mcpu=sparclet:-Asparclet} %{mcpu=tsc701:-Asparclet} \
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%{msparclite:-Asparclite} \
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%{mf930:-Asparclite} %{mf934:-Asparclite} \
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%{mcpu=sparclite:-Asparclite} \
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@ -379,6 +381,14 @@ extern int target_flags;
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#define MASK_LIVE_G0 0x100000
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#define TARGET_LIVE_G0 (target_flags & MASK_LIVE_G0)
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/* Non-zero means the cpu has broken `save' and `restore' insns, only
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the trivial versions work (save %g0,%g0,%g0; restore %g0,%g0,%g0).
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We assume the environment will properly handle or otherwise avoid
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trouble associated with an interrupt occuring after the `save' or trap
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occuring during it. */
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#define MASK_BROKEN_SAVERESTORE 0x200000
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#define TARGET_BROKEN_SAVERESTORE (target_flags & MASK_BROKEN_SAVERESTORE)
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/* Macro to define tables used to set the flags.
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This is a list in braces of pairs in braces,
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each pair being { "NAME", VALUE }
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@ -458,7 +468,7 @@ enum processor_type {
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PROCESSOR_F930,
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PROCESSOR_F934,
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PROCESSOR_SPARCLET,
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PROCESSOR_90C701,
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PROCESSOR_TSC701,
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PROCESSOR_V8PLUS,
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PROCESSOR_V9,
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PROCESSOR_ULTRASPARC
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