re PR target/49939 ([avr] Skip 2-word instructions if applicable)
PR target/49939 * config/avr/avr.md (*movqi): Rename to movqi_insn. (*call_insn): Rename to call_insn. (*call_value_insn): Rename to call_value_insn. * config/avr/avr.c (avr_2word_insn_p): New static function. (jump_over_one_insn_p): Use it. From-SVN: r179843
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2011-10-12 Georg-Johann Lay <avr@gjlay.de>
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PR target/49939
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* config/avr/avr.md (*movqi): Rename to movqi_insn.
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(*call_insn): Rename to call_insn.
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(*call_value_insn): Rename to call_value_insn.
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* config/avr/avr.c (avr_2word_insn_p): New static function.
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(jump_over_one_insn_p): Use it.
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2011-10-12 Richard Sandiford <richard.sandiford@linaro.org>
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2011-10-12 Richard Sandiford <richard.sandiford@linaro.org>
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* expr.h (copy_blkmode_to_reg): Declare.
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* expr.h (copy_blkmode_to_reg): Declare.
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@ -7202,6 +7202,53 @@ test_hard_reg_class (enum reg_class rclass, rtx x)
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}
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}
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/* Helper for jump_over_one_insn_p: Test if INSN is a 2-word instruction
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and thus is suitable to be skipped by CPSE, SBRC, etc. */
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static bool
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avr_2word_insn_p (rtx insn)
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{
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if (avr_current_device->errata_skip
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|| !insn
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|| 2 != get_attr_length (insn))
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{
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return false;
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}
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switch (INSN_CODE (insn))
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{
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default:
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return false;
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case CODE_FOR_movqi_insn:
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{
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rtx set = single_set (insn);
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rtx src = SET_SRC (set);
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rtx dest = SET_DEST (set);
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/* Factor out LDS and STS from movqi_insn. */
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if (MEM_P (dest)
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&& (REG_P (src) || src == const0_rtx))
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{
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return CONSTANT_ADDRESS_P (XEXP (dest, 0));
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}
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else if (REG_P (dest)
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&& MEM_P (src))
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{
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return CONSTANT_ADDRESS_P (XEXP (src, 0));
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}
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return false;
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}
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case CODE_FOR_call_insn:
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case CODE_FOR_call_value_insn:
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return true;
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}
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}
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int
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int
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jump_over_one_insn_p (rtx insn, rtx dest)
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jump_over_one_insn_p (rtx insn, rtx dest)
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{
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{
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@ -7210,7 +7257,11 @@ jump_over_one_insn_p (rtx insn, rtx dest)
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: dest);
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: dest);
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int jump_addr = INSN_ADDRESSES (INSN_UID (insn));
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int jump_addr = INSN_ADDRESSES (INSN_UID (insn));
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int dest_addr = INSN_ADDRESSES (uid);
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int dest_addr = INSN_ADDRESSES (uid);
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return dest_addr - jump_addr == get_attr_length (insn) + 1;
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int jump_offset = dest_addr - jump_addr - get_attr_length (insn);
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return (jump_offset == 1
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|| (jump_offset == 2
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&& avr_2word_insn_p (next_active_insn (insn))));
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}
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}
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/* Returns 1 if a value of mode MODE can be stored starting with hard
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/* Returns 1 if a value of mode MODE can be stored starting with hard
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@ -296,7 +296,7 @@
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operands[1] = copy_to_mode_reg(QImode, operand1);
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operands[1] = copy_to_mode_reg(QImode, operand1);
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")
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")
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(define_insn "*movqi"
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(define_insn "movqi_insn"
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[(set (match_operand:QI 0 "nonimmediate_operand" "=r,d,Qm,r,q,r,*r")
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[(set (match_operand:QI 0 "nonimmediate_operand" "=r,d,Qm,r,q,r,*r")
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(match_operand:QI 1 "general_operand" "rL,i,rL,Qm,r,q,i"))]
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(match_operand:QI 1 "general_operand" "rL,i,rL,Qm,r,q,i"))]
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"(register_operand (operands[0],QImode)
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"(register_operand (operands[0],QImode)
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@ -3627,7 +3627,7 @@
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""
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""
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"")
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"")
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(define_insn "*call_insn"
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(define_insn "call_insn"
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[(parallel[(call (mem:HI (match_operand:HI 0 "nonmemory_operand" "z,s,z,s"))
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[(parallel[(call (mem:HI (match_operand:HI 0 "nonmemory_operand" "z,s,z,s"))
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(match_operand:HI 1 "general_operand" "X,X,X,X"))
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(match_operand:HI 1 "general_operand" "X,X,X,X"))
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(use (match_operand:HI 2 "const_int_operand" "L,L,P,P"))])]
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(use (match_operand:HI 2 "const_int_operand" "L,L,P,P"))])]
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@ -3650,7 +3650,7 @@
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(const_int 2)
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(const_int 2)
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(const_int 1))])])
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(const_int 1))])])
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(define_insn "*call_value_insn"
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(define_insn "call_value_insn"
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[(parallel[(set (match_operand 0 "register_operand" "=r,r,r,r")
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[(parallel[(set (match_operand 0 "register_operand" "=r,r,r,r")
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(call (mem:HI (match_operand:HI 1 "nonmemory_operand" "z,s,z,s"))
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(call (mem:HI (match_operand:HI 1 "nonmemory_operand" "z,s,z,s"))
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(match_operand:HI 2 "general_operand" "X,X,X,X")))
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(match_operand:HI 2 "general_operand" "X,X,X,X")))
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