20000715-1.c: Remove target selector.

* gcc.target/alpha/20000715-1.c: Remove target selector.
	* gcc.target/alpha/20011018-1.c: Ditto.
	* gcc.target/alpha/980217-1.c: Ditto.
	* gcc.target/alpha/asm-1.c: Ditto.
	* gcc.target/alpha/base-1.c: Ditto.
	* gcc.target/alpha/base-2.c: Ditto.
	* gcc.target/alpha/cix-1.c: Ditto.
	* gcc.target/alpha/cix-2.c: Ditto.
	* gcc.target/alpha/max-1.c: Ditto.
	* gcc.target/alpha/max-2.c: Ditto.

From-SVN: r155426

gcc/testsuite/ChangeLog

@@ -1,3 +1,16 @@
+2009-12-23  Uros Bizjak  <ubizjak@gmail.com>
+
+	* gcc.target/alpha/20000715-1.c: Remove target selector.
+	* gcc.target/alpha/20011018-1.c: Ditto.
+	* gcc.target/alpha/980217-1.c: Ditto.
+	* gcc.target/alpha/asm-1.c: Ditto.
+	* gcc.target/alpha/base-1.c: Ditto.
+	* gcc.target/alpha/base-2.c: Ditto.
+	* gcc.target/alpha/cix-1.c: Ditto.
+	* gcc.target/alpha/cix-2.c: Ditto.
+	* gcc.target/alpha/max-1.c: Ditto.
+	* gcc.target/alpha/max-2.c: Ditto.
+
 2009-12-23  Sebastian Pop  <sebpop@gmail.com>
 
 	* g++.dg/graphite/id-1.C: New.

gcc/testsuite/gcc.target/alpha/20000715-1.c

@@ -1,4 +1,4 @@
-/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-O2 -mieee" } */
 
 float foo(unsigned char n)

gcc/testsuite/gcc.target/alpha/20011018-1.c

@@ -1,4 +1,4 @@
-/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-O2 -mieee" } */
 
 double foo (void);

gcc/testsuite/gcc.target/alpha/980217-1.c

@@ -1,6 +1,6 @@
 /* Test float on alpha. */
 
-/* { dg-do run { target alpha*-*-* } } */
+/* { dg-do run } */
 /* { dg-options "-mieee -O2" } */
 
 extern void abort(void);

gcc/testsuite/gcc.target/alpha/asm-1.c

@@ -1,7 +1,7 @@
 /* Asm operands that are given as hard registers must keep the same
    hard register all the way through compilation.  Example derived
    from glibc source.  */
-/* { dg-do compile { target alpha*-*-* } } */
+/* { dg-do compile } */
 /* { dg-options "-O2 -frename-registers -fcprop-registers" } */
 /* { dg-final { scan-assembler "callsys1 .0 .19 .0 .16 .17" } } */
 /* { dg-final { scan-assembler "callsys2 .0 .19 .0 .16 .17" } } */

gcc/testsuite/gcc.target/alpha/base-1.c

@@ -1,5 +1,5 @@
 /* Test that the base isa builtins compile.  */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
 /* { dg-options "-mcpu=ev4" } */
 
 void test_BASE (long x, long y)

gcc/testsuite/gcc.target/alpha/base-2.c

@@ -1,5 +1,5 @@
 /* Test that alpha-base-1.c compiles with optimization.  */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
 /* { dg-options "-mcpu=ev4 -O2" } */
 
 #include "base-1.c"

gcc/testsuite/gcc.target/alpha/cix-1.c

@@ -1,5 +1,5 @@
 /* Test that the CIX isa builtins compile.  */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
 /* { dg-options "-mcpu=ev67" } */
 
 void test_CIX (long x)

gcc/testsuite/gcc.target/alpha/cix-2.c

@@ -1,5 +1,5 @@
 /* Test that alpha-cix-1.c compiles with optimization.  */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
 /* { dg-options "-mcpu=ev67 -O2" } */
 
 #include "cix-1.c"

gcc/testsuite/gcc.target/alpha/max-1.c

@@ -1,5 +1,5 @@
 /* Test that the MAX isa builtins compile.  */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
 /* { dg-options "-mcpu=pca56" } */
 
 void test_MAX (long x, long y)

gcc/testsuite/gcc.target/alpha/max-2.c

@@ -1,5 +1,5 @@
 /* Test that alpha-max-1.c compiles with optimization.  */
-/* { dg-do link { target alpha*-*-* } } */
+/* { dg-do link } */
 /* { dg-options "-mcpu=pca56 -O2" } */
 
 #include "max-1.c"