20000715-1.c: Remove target selector.
* gcc.target/alpha/20000715-1.c: Remove target selector. * gcc.target/alpha/20011018-1.c: Ditto. * gcc.target/alpha/980217-1.c: Ditto. * gcc.target/alpha/asm-1.c: Ditto. * gcc.target/alpha/base-1.c: Ditto. * gcc.target/alpha/base-2.c: Ditto. * gcc.target/alpha/cix-1.c: Ditto. * gcc.target/alpha/cix-2.c: Ditto. * gcc.target/alpha/max-1.c: Ditto. * gcc.target/alpha/max-2.c: Ditto. From-SVN: r155426
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2009-12-23 Uros Bizjak <ubizjak@gmail.com>
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* gcc.target/alpha/20000715-1.c: Remove target selector.
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* gcc.target/alpha/20011018-1.c: Ditto.
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* gcc.target/alpha/980217-1.c: Ditto.
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* gcc.target/alpha/asm-1.c: Ditto.
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* gcc.target/alpha/base-1.c: Ditto.
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* gcc.target/alpha/base-2.c: Ditto.
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* gcc.target/alpha/cix-1.c: Ditto.
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* gcc.target/alpha/cix-2.c: Ditto.
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* gcc.target/alpha/max-1.c: Ditto.
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* gcc.target/alpha/max-2.c: Ditto.
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2009-12-23 Sebastian Pop <sebpop@gmail.com>
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* g++.dg/graphite/id-1.C: New.
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@ -1,4 +1,4 @@
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/* { dg-do compile { target alpha*-*-* } } */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mieee" } */
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float foo(unsigned char n)
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/* { dg-do compile { target alpha*-*-* } } */
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/* { dg-do compile } */
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/* { dg-options "-O2 -mieee" } */
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double foo (void);
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/* Test float on alpha. */
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/* { dg-do run { target alpha*-*-* } } */
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/* { dg-do run } */
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/* { dg-options "-mieee -O2" } */
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extern void abort(void);
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/* Asm operands that are given as hard registers must keep the same
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hard register all the way through compilation. Example derived
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from glibc source. */
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/* { dg-do compile { target alpha*-*-* } } */
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/* { dg-do compile } */
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/* { dg-options "-O2 -frename-registers -fcprop-registers" } */
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/* { dg-final { scan-assembler "callsys1 .0 .19 .0 .16 .17" } } */
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/* { dg-final { scan-assembler "callsys2 .0 .19 .0 .16 .17" } } */
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/* Test that the base isa builtins compile. */
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/* { dg-do link { target alpha*-*-* } } */
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/* { dg-do link } */
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/* { dg-options "-mcpu=ev4" } */
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void test_BASE (long x, long y)
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/* Test that alpha-base-1.c compiles with optimization. */
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/* { dg-do link { target alpha*-*-* } } */
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/* { dg-do link } */
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/* { dg-options "-mcpu=ev4 -O2" } */
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#include "base-1.c"
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/* Test that the CIX isa builtins compile. */
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/* { dg-do link { target alpha*-*-* } } */
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/* { dg-do link } */
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/* { dg-options "-mcpu=ev67" } */
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void test_CIX (long x)
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/* Test that alpha-cix-1.c compiles with optimization. */
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/* { dg-do link { target alpha*-*-* } } */
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/* { dg-do link } */
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/* { dg-options "-mcpu=ev67 -O2" } */
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#include "cix-1.c"
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/* Test that the MAX isa builtins compile. */
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/* { dg-do link { target alpha*-*-* } } */
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/* { dg-do link } */
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/* { dg-options "-mcpu=pca56" } */
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void test_MAX (long x, long y)
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/* Test that alpha-max-1.c compiles with optimization. */
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/* { dg-do link { target alpha*-*-* } } */
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/* { dg-do link } */
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/* { dg-options "-mcpu=pca56 -O2" } */
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#include "max-1.c"
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