Fix bug 64893: ICE with vget_lane_u32 with C++ front-end
2015-02-11 Andrew Pinski <apinski@cavium.com> PR target/64893 * config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins): Change the first argument type to size_type_node and add another size_type_node. (aarch64_simd_expand_builtin): Handle the new argument to AARCH64_SIMD_BUILTIN_LANE_CHECK and don't ICE but rather print an out when the first two arguments are not nonzero integer constants. * config/aarch64/arm_neon.h (__AARCH64_LANE_CHECK): Pass the sizeof directly to __builtin_aarch64_im_lane_boundsi. 2015-02-11 Andrew Pinski <apinski@cavium.com> PR target/64893 * c-c++-common/torture/aarch64-vect-lane-1.c: New testcase. * c-c++-common/torture/aarch64-vect-lane-2.c: New testcase. From-SVN: r220610
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@ -1,3 +1,16 @@
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2015-02-11 Andrew Pinski <apinski@cavium.com>
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PR target/64893
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* config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins):
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Change the first argument type to size_type_node and add another
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size_type_node.
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(aarch64_simd_expand_builtin): Handle the new argument to
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AARCH64_SIMD_BUILTIN_LANE_CHECK and don't ICE but rather
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print an out when the first two arguments are not
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nonzero integer constants.
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* config/aarch64/arm_neon.h (__AARCH64_LANE_CHECK):
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Pass the sizeof directly to __builtin_aarch64_im_lane_boundsi.
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2015-02-11 Jakub Jelinek <jakub@redhat.com>
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PR target/61925
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@ -712,7 +712,8 @@ aarch64_init_simd_builtins (void)
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aarch64_init_simd_builtin_scalar_types ();
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tree lane_check_fpr = build_function_type_list (void_type_node,
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intSI_type_node,
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size_type_node,
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size_type_node,
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intSI_type_node,
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NULL);
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aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_LANE_CHECK] =
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@ -1001,13 +1002,23 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target)
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{
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if (fcode == AARCH64_SIMD_BUILTIN_LANE_CHECK)
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{
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tree nlanes = CALL_EXPR_ARG (exp, 0);
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gcc_assert (TREE_CODE (nlanes) == INTEGER_CST);
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rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 1));
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if (CONST_INT_P (lane_idx))
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aarch64_simd_lane_bounds (lane_idx, 0, TREE_INT_CST_LOW (nlanes), exp);
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rtx totalsize = expand_normal (CALL_EXPR_ARG (exp, 0));
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rtx elementsize = expand_normal (CALL_EXPR_ARG (exp, 1));
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if (CONST_INT_P (totalsize) && CONST_INT_P (elementsize)
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&& UINTVAL (elementsize) != 0
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&& UINTVAL (totalsize) != 0)
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{
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rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 2));
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if (CONST_INT_P (lane_idx))
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aarch64_simd_lane_bounds (lane_idx, 0,
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UINTVAL (totalsize)
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/ UINTVAL (elementsize),
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exp);
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else
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error ("%Klane index must be a constant immediate", exp);
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}
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else
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error ("%Klane index must be a constant immediate", exp);
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error ("%Ktotal size and element size must be a non-zero constant immediate", exp);
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/* Don't generate any RTL. */
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return const0_rtx;
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}
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@ -541,7 +541,7 @@ typedef struct poly16x8x4_t
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#define __AARCH64_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0]))
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#define __AARCH64_LANE_CHECK(__vec, __idx) \
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__builtin_aarch64_im_lane_boundsi (__AARCH64_NUM_LANES (__vec), __idx)
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__builtin_aarch64_im_lane_boundsi (sizeof(__vec), sizeof(__vec[0]), __idx)
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/* For big-endian, GCC's vector indices are the opposite way around
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to the architectural lane indices used by Neon intrinsics. */
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@ -1,3 +1,9 @@
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2015-02-11 Andrew Pinski <apinski@cavium.com>
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PR target/64893
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* c-c++-common/torture/aarch64-vect-lane-1.c: New testcase.
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* c-c++-common/torture/aarch64-vect-lane-2.c: New testcase.
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2015-02-11 Jakub Jelinek <jakub@redhat.com>
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PR target/61925
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