Add prefetch configuration to aarch64 backend.
* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune): New tune structure. (struct tune_params): Use cpu_prefetch_tune instead of cache_line_size. [Unrelated to main purpose of the patch] Place the pointer field last to enable type checking errors when tune structure are wrongly merged. * config/aarch64/aarch64.c (generic_prefetch_tune,) (exynosm1_prefetch_tune, qdf24xx_prefetch_tune,) (thunderx2t99_prefetch_tune): New tune constants. (tune_params *_tunings): Update all tunings (no functional change). (aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES, PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE from tunings structures. Change-Id: I1ddbac1863dcf078a2e5b14dd904debc76a7da94 From-SVN: r249240
This commit is contained in:
Maxim Kuvyrkov
Maxim Kuvyrkov
parent
b783399af9
commit
9d2c6e2eb7
@ -1,3 +1,18 @@
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2017-06-16 Maxim Kuvyrkov <maxim.kuvyrkov@linaro.org>
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* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune):
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New tune structure.
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(struct tune_params): Use cpu_prefetch_tune instead of cache_line_size.
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[Unrelated to main purpose of the patch] Place the pointer field last
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to enable type checking errors when tune structure are wrongly merged.
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* config/aarch64/aarch64.c (generic_prefetch_tune,)
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(exynosm1_prefetch_tune, qdf24xx_prefetch_tune,)
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(thunderx2t99_prefetch_tune): New tune constants.
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(tune_params *_tunings): Update all tunings (no functional change).
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(aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES,
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PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE
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from tunings structures.
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2017-06-16 Jakub Jelinek <jakub@redhat.com>
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PR sanitizer/81094
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@ -203,6 +203,15 @@ struct cpu_approx_modes
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const unsigned int recip_sqrt; /* Reciprocal square root. */
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};
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/* Cache prefetch settings for prefetch-loop-arrays. */
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struct cpu_prefetch_tune
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{
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const int num_slots;
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const int l1_cache_size;
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const int l1_cache_line_size;
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const int l2_cache_size;
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};
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struct tune_params
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{
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const struct cpu_cost_table *insn_extra_cost;
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@ -224,9 +233,6 @@ struct tune_params
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int min_div_recip_mul_df;
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/* Value for aarch64_case_values_threshold; or 0 for the default. */
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unsigned int max_case_values;
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/* Value for PARAM_L1_CACHE_LINE_SIZE; or 0 to use the default. */
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unsigned int cache_line_size;
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/* An enum specifying how to take into account CPU autoprefetch capabilities
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during instruction scheduling:
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- AUTOPREFETCHER_OFF: Do not take autoprefetch capabilities into account.
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@ -244,6 +250,10 @@ struct tune_params
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} autoprefetcher_model;
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unsigned int extra_tuning_flags;
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/* Place prefetch struct pointer at the end to enable type checking
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errors when tune_params misses elements (e.g., from erroneous merges). */
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const struct cpu_prefetch_tune *prefetch;
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};
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#define AARCH64_FUSION_PAIR(x, name) \
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@ -526,6 +526,39 @@ static const cpu_approx_modes xgene1_approx_modes =
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AARCH64_APPROX_ALL /* recip_sqrt */
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};
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/* Generic prefetch settings (which disable prefetch). */
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static const cpu_prefetch_tune generic_prefetch_tune =
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{
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0, /* num_slots */
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-1, /* l1_cache_size */
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-1, /* l1_cache_line_size */
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-1 /* l2_cache_size */
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};
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static const cpu_prefetch_tune exynosm1_prefetch_tune =
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{
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0, /* num_slots */
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-1, /* l1_cache_size */
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64, /* l1_cache_line_size */
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-1 /* l2_cache_size */
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};
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static const cpu_prefetch_tune qdf24xx_prefetch_tune =
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{
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0, /* num_slots */
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-1, /* l1_cache_size */
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64, /* l1_cache_line_size */
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-1 /* l2_cache_size */
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};
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static const cpu_prefetch_tune thunderx2t99_prefetch_tune =
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{
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0, /* num_slots */
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-1, /* l1_cache_size */
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64, /* l1_cache_line_size */
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-1 /* l2_cache_size */
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};
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static const struct tune_params generic_tunings =
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{
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&cortexa57_extra_costs,
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@ -546,9 +579,9 @@ static const struct tune_params generic_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params cortexa35_tunings =
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@ -572,9 +605,9 @@ static const struct tune_params cortexa35_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params cortexa53_tunings =
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@ -598,9 +631,9 @@ static const struct tune_params cortexa53_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params cortexa57_tunings =
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@ -624,9 +657,9 @@ static const struct tune_params cortexa57_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_RENAME_FMA_REGS) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_RENAME_FMA_REGS), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params cortexa72_tunings =
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@ -650,9 +683,9 @@ static const struct tune_params cortexa72_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params cortexa73_tunings =
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@ -676,11 +709,13 @@ static const struct tune_params cortexa73_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params exynosm1_tunings =
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{
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&exynosm1_extra_costs,
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@ -701,9 +736,9 @@ static const struct tune_params exynosm1_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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48, /* max_case_values. */
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64, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_WEAK, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&exynosm1_prefetch_tune
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};
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static const struct tune_params thunderx_tunings =
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@ -726,9 +761,9 @@ static const struct tune_params thunderx_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_OFF, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_SLOW_UNALIGNED_LDPW), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params xgene1_tunings =
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@ -751,9 +786,9 @@ static const struct tune_params xgene1_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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0, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_OFF, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&generic_prefetch_tune
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};
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static const struct tune_params qdf24xx_tunings =
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@ -777,9 +812,9 @@ static const struct tune_params qdf24xx_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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64, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_STRONG, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&qdf24xx_prefetch_tune
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};
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static const struct tune_params thunderx2t99_tunings =
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@ -802,9 +837,9 @@ static const struct tune_params thunderx2t99_tunings =
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2, /* min_div_recip_mul_sf. */
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2, /* min_div_recip_mul_df. */
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0, /* max_case_values. */
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64, /* cache_line_size. */
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tune_params::AUTOPREFETCHER_OFF, /* autoprefetcher_model. */
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(AARCH64_EXTRA_TUNE_NONE) /* tune_flags. */
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(AARCH64_EXTRA_TUNE_NONE), /* tune_flags. */
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&thunderx2t99_prefetch_tune
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};
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/* Support for fine-grained override of the tuning structures. */
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@ -8747,10 +8782,27 @@ aarch64_override_options_internal (struct gcc_options *opts)
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opts->x_param_values,
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global_options_set.x_param_values);
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/* Set the L1 cache line size. */
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if (selected_cpu->tune->cache_line_size != 0)
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/* Set up parameters to be used in prefetching algorithm. Do not
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override the defaults unless we are tuning for a core we have
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researched values for. */
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if (aarch64_tune_params.prefetch->num_slots > 0)
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maybe_set_param_value (PARAM_SIMULTANEOUS_PREFETCHES,
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aarch64_tune_params.prefetch->num_slots,
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opts->x_param_values,
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global_options_set.x_param_values);
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if (aarch64_tune_params.prefetch->l1_cache_size >= 0)
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maybe_set_param_value (PARAM_L1_CACHE_SIZE,
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aarch64_tune_params.prefetch->l1_cache_size,
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opts->x_param_values,
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global_options_set.x_param_values);
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if (aarch64_tune_params.prefetch->l1_cache_line_size >= 0)
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maybe_set_param_value (PARAM_L1_CACHE_LINE_SIZE,
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selected_cpu->tune->cache_line_size,
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aarch64_tune_params.prefetch->l1_cache_line_size,
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opts->x_param_values,
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global_options_set.x_param_values);
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if (aarch64_tune_params.prefetch->l2_cache_size >= 0)
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maybe_set_param_value (PARAM_L2_CACHE_SIZE,
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aarch64_tune_params.prefetch->l2_cache_size,
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opts->x_param_values,
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global_options_set.x_param_values);
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