haifa-sched.c (prune_ready_list): New function, broken out of schedule_block.
* haifa-sched.c (prune_ready_list): New function, broken out of schedule_block. (schedule_block): Use it. From-SVN: r171845
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@ -32,6 +32,10 @@
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* sched-rgn.c (begin_schedule_ready): Remove second argument.
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* sched-rgn.c (begin_schedule_ready): Remove second argument.
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(rgn_const_sched_info): Add NULL entry for the begin_move_insn field.
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(rgn_const_sched_info): Add NULL entry for the begin_move_insn field.
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* haifa-sched.c (prune_ready_list): New function, broken out of
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schedule_block.
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(schedule_block): Use it.
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2011-04-01 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
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2011-04-01 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
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* config/spu/t-spu-elf (dp-bit.c): Use > instead of >>.
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* config/spu/t-spu-elf (dp-bit.c): Use > instead of >>.
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@ -2613,8 +2613,8 @@ max_issue (struct ready_list *ready, int privileged_n, state_t state,
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{
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{
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if (state_dead_lock_p (state)
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if (state_dead_lock_p (state)
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|| insn_finishes_cycle_p (insn))
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|| insn_finishes_cycle_p (insn))
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/* We won't issue any more instructions in the next
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/* We won't issue any more instructions in the next
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choice_state. */
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choice_state. */
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top->rest = 0;
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top->rest = 0;
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else
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else
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top->rest--;
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top->rest--;
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@ -2862,6 +2862,52 @@ commit_schedule (rtx prev_head, rtx tail, basic_block *target_bb)
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VEC_truncate (rtx, scheduled_insns, 0);
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VEC_truncate (rtx, scheduled_insns, 0);
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}
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}
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/* Examine all insns on the ready list and queue those which can't be
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issued in this cycle. TEMP_STATE is temporary scheduler state we
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can use as scratch space. If FIRST_CYCLE_INSN_P is true, no insns
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have been issued for the current cycle, which means it is valid to
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issue an asm statement. */
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static void
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prune_ready_list (state_t temp_state, bool first_cycle_insn_p)
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{
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int i;
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restart:
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for (i = 0; i < ready.n_ready; i++)
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{
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rtx insn = ready_element (&ready, i);
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int cost = 0;
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const char *reason = "resource conflict";
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if (recog_memoized (insn) < 0)
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{
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if (!first_cycle_insn_p
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&& (GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| asm_noperands (PATTERN (insn)) >= 0))
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cost = 1;
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reason = "asm";
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}
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else if (flag_sched_pressure)
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cost = 0;
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else
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{
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memcpy (temp_state, curr_state, dfa_state_size);
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cost = state_transition (temp_state, insn);
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if (cost < 0)
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cost = 0;
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else if (cost == 0)
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cost = 1;
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}
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if (cost >= 1)
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{
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ready_remove (&ready, i);
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queue_insn (insn, cost, reason);
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goto restart;
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}
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}
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}
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/* Use forward list scheduling to rearrange insns of block pointed to by
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/* Use forward list scheduling to rearrange insns of block pointed to by
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TARGET_BB, possibly bringing insns from subsequent blocks in the same
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TARGET_BB, possibly bringing insns from subsequent blocks in the same
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region. */
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region. */
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@ -3013,6 +3059,10 @@ schedule_block (basic_block *target_bb)
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}
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}
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while (advance > 0);
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while (advance > 0);
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prune_ready_list (temp_state, true);
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if (ready.n_ready == 0)
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continue;
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if (sort_p)
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if (sort_p)
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{
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{
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/* Sort the ready list based on priority. */
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/* Sort the ready list based on priority. */
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@ -3143,44 +3193,6 @@ schedule_block (basic_block *target_bb)
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}
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}
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sort_p = TRUE;
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sort_p = TRUE;
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memcpy (temp_state, curr_state, dfa_state_size);
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if (recog_memoized (insn) < 0)
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{
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asm_p = (GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| asm_noperands (PATTERN (insn)) >= 0);
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if (!first_cycle_insn_p && asm_p)
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/* This is asm insn which is tried to be issued on the
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cycle not first. Issue it on the next cycle. */
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cost = 1;
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else
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/* A USE insn, or something else we don't need to
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understand. We can't pass these directly to
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state_transition because it will trigger a
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fatal error for unrecognizable insns. */
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cost = 0;
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}
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else if (sched_pressure_p)
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cost = 0;
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else
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{
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cost = state_transition (temp_state, insn);
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if (cost < 0)
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cost = 0;
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else if (cost == 0)
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cost = 1;
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}
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if (cost >= 1)
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{
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queue_insn (insn, cost, "resource conflict");
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if (SCHED_GROUP_P (insn))
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{
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advance = cost;
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break;
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}
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continue;
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}
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if (current_sched_info->can_schedule_ready_p
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if (current_sched_info->can_schedule_ready_p
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&& ! (*current_sched_info->can_schedule_ready_p) (insn))
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&& ! (*current_sched_info->can_schedule_ready_p) (insn))
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@ -3201,14 +3213,20 @@ schedule_block (basic_block *target_bb)
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/* Update counters, etc in the scheduler's front end. */
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/* Update counters, etc in the scheduler's front end. */
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(*current_sched_info->begin_schedule_ready) (insn);
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(*current_sched_info->begin_schedule_ready) (insn);
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VEC_safe_push (rtx, heap, scheduled_insns, insn);
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VEC_safe_push (rtx, heap, scheduled_insns, insn);
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last_scheduled_insn = insn;
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last_scheduled_insn = insn;
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if (memcmp (curr_state, temp_state, dfa_state_size) != 0)
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if (recog_memoized (insn) >= 0)
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{
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{
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cycle_issued_insns++;
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cost = state_transition (curr_state, insn);
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memcpy (curr_state, temp_state, dfa_state_size);
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if (!flag_sched_pressure)
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}
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gcc_assert (cost < 0);
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cycle_issued_insns++;
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asm_p = false;
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}
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else
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asm_p = (GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| asm_noperands (PATTERN (insn)) >= 0);
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if (targetm.sched.variable_issue)
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if (targetm.sched.variable_issue)
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can_issue_more =
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can_issue_more =
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@ -3229,6 +3247,9 @@ schedule_block (basic_block *target_bb)
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first_cycle_insn_p = false;
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first_cycle_insn_p = false;
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if (ready.n_ready > 0)
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prune_ready_list (temp_state, false);
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/* Sort the ready list based on priority. This must be
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/* Sort the ready list based on priority. This must be
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redone here, as schedule_insn may have readied additional
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redone here, as schedule_insn may have readied additional
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insns that will not be sorted correctly. */
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insns that will not be sorted correctly. */
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@ -3240,7 +3261,7 @@ schedule_block (basic_block *target_bb)
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if (ready.n_ready && DEBUG_INSN_P (ready_element (&ready, 0))
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if (ready.n_ready && DEBUG_INSN_P (ready_element (&ready, 0))
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&& (*current_sched_info->schedule_more_p) ())
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&& (*current_sched_info->schedule_more_p) ())
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{
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{
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while (ready.n_ready && DEBUG_INSN_P (ready_element (&ready, 0)))
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while (ready.n_ready && DEBUG_INSN_P (ready_element (&ready, 0)))
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{
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{
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insn = ready_remove_first (&ready);
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insn = ready_remove_first (&ready);
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gcc_assert (DEBUG_INSN_P (insn));
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gcc_assert (DEBUG_INSN_P (insn));
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