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Convert sparc over to TARGET_SECONDARY_RELOAD.

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gcc/

	* config/sparc/sparc.h (SECONDARY_INPUT_RELOAD_CLASS,
	SECONDARY_OUTPUT_RELOAD_CLASS): Delete.
	* config/sparc/sparc.c (TARGET_SECONDARY_RELOAD): Redefine.
	(sparc_secondary_reload): New function.

From-SVN: r180323
This commit is contained in:
David S. Miller 2011-10-22 07:05:32 +00:00 committed by David S. Miller
parent 40c4cbcd82
commit 9dc98917cc
3 changed files with 53 additions and 48 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2011-10-22 David S. Miller <davem@davemloft.net>
* config/sparc/sparc.h (SECONDARY_INPUT_RELOAD_CLASS,
SECONDARY_OUTPUT_RELOAD_CLASS): Delete.
* config/sparc/sparc.c (TARGET_SECONDARY_RELOAD): Redefine.
(sparc_secondary_reload): New function.
2011-10-21 Paul Brook <paul@codesourcery.com>
* config/c6x/c6x.c (c6x_asm_emit_except_personality,

46
gcc/config/sparc/sparc.c
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@ -500,6 +500,8 @@ static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass);
static bool sparc_print_operand_punct_valid_p (unsigned char);
static void sparc_print_operand (FILE *, rtx, int);
static void sparc_print_operand_address (FILE *, rtx);
static reg_class_t sparc_secondary_reload (bool, rtx, reg_class_t,
enum machine_mode, secondary_reload_info *);
#ifdef SUBTARGET_ATTRIBUTE_TABLE
/* Table of valid machine attributes. */
@ -674,6 +676,9 @@ char sparc_hard_reg_printed[8];
#undef TARGET_PREFERRED_RELOAD_CLASS
#define TARGET_PREFERRED_RELOAD_CLASS sparc_preferred_reload_class
#undef TARGET_SECONDARY_RELOAD
#define TARGET_SECONDARY_RELOAD sparc_secondary_reload
#undef TARGET_CONDITIONAL_REGISTER_USAGE
#define TARGET_CONDITIONAL_REGISTER_USAGE sparc_conditional_register_usage
@ -11200,4 +11205,45 @@ sparc_expand_vector_init (rtx target, rtx vals)
emit_move_insn (target, mem);
}
static reg_class_t
sparc_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i,
enum machine_mode mode, secondary_reload_info *sri)
{
enum reg_class rclass = (enum reg_class) rclass_i;
/* We need a temporary when loading/storing a HImode/QImode value
between memory and the FPU registers. This can happen when combine puts
a paradoxical subreg in a float/fix conversion insn. */
if (FP_REG_CLASS_P (rclass)
&& (mode == HImode || mode == QImode)
&& (GET_CODE (x) == MEM
|| ((GET_CODE (x) == REG || GET_CODE (x) == SUBREG)
&& true_regnum (x) == -1)))
return GENERAL_REGS;
/* On 32-bit we need a temporary when loading/storing a DFmode value
between unaligned memory and the upper FPU registers. */
if (TARGET_ARCH32
&& rclass == EXTRA_FP_REGS
&& mode == DFmode
&& GET_CODE (x) == MEM
&& ! mem_min_alignment (x, 8))
return FP_REGS;
if (((TARGET_CM_MEDANY
&& symbolic_operand (x, mode))
|| (TARGET_CM_EMBMEDANY
&& text_segment_operand (x, mode)))
&& ! flag_pic)
{
if (in_p)
sri->icode = direct_optab_handler (reload_in_optab, mode);
else
sri->icode = direct_optab_handler (reload_out_optab, mode);
return NO_REGS;
}
return NO_REGS;
}
#include "gt-sparc.h"

48
gcc/config/sparc/sparc.h
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@ -1112,54 +1112,6 @@ extern char leaf_reg_remap[];
#define SPARC_SETHI32_P(X) \
(SPARC_SETHI_P ((unsigned HOST_WIDE_INT) (X) & GET_MODE_MASK (SImode)))
/* Return the register class of a scratch register needed to load IN into
a register of class CLASS in MODE.
We need a temporary when loading/storing a HImode/QImode value
between memory and the FPU registers. This can happen when combine puts
a paradoxical subreg in a float/fix conversion insn.
We need a temporary when loading/storing a DFmode value between
unaligned memory and the upper FPU registers. */
#define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
((FP_REG_CLASS_P (CLASS) \
&& ((MODE) == HImode || (MODE) == QImode) \
&& (GET_CODE (IN) == MEM \
|| ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \
&& true_regnum (IN) == -1))) \
? GENERAL_REGS \
: ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \
&& GET_CODE (IN) == MEM && TARGET_ARCH32 \
&& ! mem_min_alignment ((IN), 8)) \
? FP_REGS \
: (((TARGET_CM_MEDANY \
&& symbolic_operand ((IN), (MODE))) \
|| (TARGET_CM_EMBMEDANY \
&& text_segment_operand ((IN), (MODE)))) \
&& !flag_pic) \
? GENERAL_REGS \
: NO_REGS)
#define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, IN) \
((FP_REG_CLASS_P (CLASS) \
&& ((MODE) == HImode || (MODE) == QImode) \
&& (GET_CODE (IN) == MEM \
|| ((GET_CODE (IN) == REG || GET_CODE (IN) == SUBREG) \
&& true_regnum (IN) == -1))) \
? GENERAL_REGS \
: ((CLASS) == EXTRA_FP_REGS && (MODE) == DFmode \
&& GET_CODE (IN) == MEM && TARGET_ARCH32 \
&& ! mem_min_alignment ((IN), 8)) \
? FP_REGS \
: (((TARGET_CM_MEDANY \
&& symbolic_operand ((IN), (MODE))) \
|| (TARGET_CM_EMBMEDANY \
&& text_segment_operand ((IN), (MODE)))) \
&& !flag_pic) \
? GENERAL_REGS \
: NO_REGS)
/* On SPARC it is not possible to directly move data between
GENERAL_REGS and FP_REGS. */
#define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \