Improved branch hints, safe hints, and scheduling.

* haifa-sched.c (sched_emit_insn) : Define.
	* sched-int.h (sched_emit_insn) : Add prototype.
	* doc/invoke.texi (-mdual-nops, -mhint-max-nops,
	-mhint-max-distance -msafe-hints) : Document.
	* config/spu/spu.c (spu_flag_var_tracking): New.
	(TARGET_SCHED_INIT_GLOBAL, TARGET_SCHED_INIT,
	TARGET_SCHED_REORDER, TARGET_SCHED_REORDER2,
	TARGET_ASM_FILE_START): Define.
	(TARGET_SCHED_ADJUST_PRIORITY): Remove.
	(STOP_HINT_P, HINTED_P, SCHED_ON_EVEN_P): Define.
	(spu_emit_branch_hint): Add blocks argument.
	(insert_branch_hints, insert_nops): Remove.
	(pad_bb, insert_hbrp_for_ilb_runout, insert_hbrp, in_spu_reorg,
	uses_ls_unit, spu_sched_init_global, spu_sched_init,
	spu_sched_reorder, asm_file_start): New functions.
	(clock_var, spu_sched_length, pipe0_clock,
	pipe1_clock, prev_clock_var, prev_priority,
	spu_ls_first, prev_ls_clock): New static variables.
	* config/spu/spu.h (TARGET_DEFAULT): Add MASK_SAFE_HINTS.
	* config/spu.md (iprefetch): Add operand, make it clobber MEM.
	(nopn_nv): Add a non-volatile version of nop.
	* config/spu/spu.opt (-mdual-nops, -mhint-max-nops,
	-mhint-max-distance, -msafe-hints): New options.

From-SVN: r140047

gcc/ChangeLog

@@ -1,3 +1,31 @@
+2008-09-05  Trevor Smigiel <Trevor_Smigiel@playstation.sony.com>
+
+	Improved branch hints, safe hints, and scheduling.
+
+	* haifa-sched.c (sched_emit_insn) : Define.
+	* sched-int.h (sched_emit_insn) : Add prototype.
+	* doc/invoke.texi (-mdual-nops, -mhint-max-nops,
+	-mhint-max-distance -msafe-hints) : Document.
+	* config/spu/spu.c (spu_flag_var_tracking): New.
+	(TARGET_SCHED_INIT_GLOBAL, TARGET_SCHED_INIT,
+	TARGET_SCHED_REORDER, TARGET_SCHED_REORDER2,
+	TARGET_ASM_FILE_START): Define.
+	(TARGET_SCHED_ADJUST_PRIORITY): Remove.
+	(STOP_HINT_P, HINTED_P, SCHED_ON_EVEN_P): Define.
+	(spu_emit_branch_hint): Add blocks argument.
+	(insert_branch_hints, insert_nops): Remove.
+	(pad_bb, insert_hbrp_for_ilb_runout, insert_hbrp, in_spu_reorg,
+	uses_ls_unit, spu_sched_init_global, spu_sched_init,
+	spu_sched_reorder, asm_file_start): New functions.
+	(clock_var, spu_sched_length, pipe0_clock,
+	pipe1_clock, prev_clock_var, prev_priority,
+	spu_ls_first, prev_ls_clock): New static variables.
+	* config/spu/spu.h (TARGET_DEFAULT): Add MASK_SAFE_HINTS.
+	* config/spu.md (iprefetch): Add operand, make it clobber MEM.
+	(nopn_nv): Add a non-volatile version of nop.
+	* config/spu/spu.opt (-mdual-nops, -mhint-max-nops,
+	-mhint-max-distance, -msafe-hints): New options.
+
 2008-09-05  Janis Johnson  <janis187@us.ibm.com>
 	    Samuel Tardieu  <sam@rfc1149.net>
 

gcc/config/spu/spu.h

@@ -50,7 +50,8 @@ extern GTY(()) int spu_tune;
 
 /* Default target_flags if no switches specified.  */
 #ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS)
+#define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \
+			| MASK_SAFE_HINTS)
 #endif
 
 

gcc/config/spu/spu.md

@@ -4200,12 +4200,23 @@ selb\t%0,%4,%0,%3"
   "lnop"
   [(set_attr "type" "lnop")])
 
+;; The operand is so we know why we generated this hbrp.
+;; We clobber mem to make sure it isn't moved over any
+;; loads, stores or calls while scheduling.
 (define_insn "iprefetch"
-  [(unspec [(const_int 0)] UNSPEC_IPREFETCH)]
+  [(unspec [(match_operand:SI 0 "const_int_operand" "n")] UNSPEC_IPREFETCH)
+   (clobber (mem:BLK (scratch)))]
   ""
-  "hbrp"
+  "hbrp\t# %0"
   [(set_attr "type" "iprefetch")])
 
+;; A non-volatile version so it gets scheduled
+(define_insn "nopn_nv"
+  [(unspec [(match_operand:SI 0 "register_operand" "r")] UNSPEC_NOP)]
+  ""
+  "nop\t%0"
+  [(set_attr "type" "nop")])
+
 (define_insn "hbr"
   [(set (reg:SI 130)
 	(unspec:SI [(match_operand:SI 0 "immediate_operand" "i,i,i")

gcc/config/spu/spu.opt

@@ -35,6 +35,14 @@ munsafe-dma
 Target Report RejectNegative InverseMask(SAFE_DMA)
 volatile must be specified on any memory that is effected by DMA
 
+mdual-nops
+Target Report Var(spu_dual_nops,10) Init(10)
+Insert nops when it might improve performance by allowing dual issue (default)
+
+mdual-nops=
+Target RejectNegative Joined UInteger Var(spu_dual_nops)
+Insert nops when it might improve performance by allowing dual issue (default)
+
 mstdmain
 Target Report Mask(STD_MAIN)
 Use standard main function as entry for startup
@@ -43,6 +51,14 @@ mbranch-hints
 Target Report Mask(BRANCH_HINTS)
 Generate branch hints for branches
 
+mhint-max-nops=
+Target RejectNegative Joined UInteger Var(spu_max_nops) Init(2)
+Maximum number of nops to insert for a hint (Default 2)
+
+mhint-max-distance=
+Target RejectNegative Joined Var(spu_max_distance_str)
+Approximate maximum number of instructions to allow between a hint and its branch [125]
+
 msmall-mem
 Target Report RejectNegative InverseMask(LARGE_MEM)
 Generate code for 18 bit addressing
@@ -55,6 +71,10 @@ mfixed-range=
 Target RejectNegative Joined Var(spu_fixed_range_string)
 Specify range of registers to make fixed
 
+msafe-hints
+Target Report Mask(SAFE_HINTS)
+Insert hbrp instructions after hinted branch targets to avoid the SPU hang issue
+
 march=
 Target RejectNegative Joined Var(spu_arch_string)
 Generate code for given CPU

gcc/doc/invoke.texi

@@ -14797,6 +14797,33 @@ useful when compiling kernel code.  A register range is specified as
 two registers separated by a dash.  Multiple register ranges can be
 specified separated by a comma.
 
+@item -mdual-nops
+@itemx -mdual-nops=@var{n}
+@opindex mdual-nops
+By default, GCC will insert nops to increase dual issue when it expects
+it to increase performance.  @var{n} can be a value from 0 to 10.  A
+smaller @var{n} will insert fewer nops.  10 is the default, 0 is the
+same as @option{-mno-dual-nops}.  Disabled with @option{-Os}.
+
+@item -mhint-max-nops=@var{n}
+@opindex mhint-max-nops
+Maximum number of nops to insert for a branch hint.  A branch hint must
+be at least 8 instructions away from the branch it is effecting.  GCC
+will insert up to @var{n} nops to enforce this, otherwise it will not
+generate the branch hint.
+
+@item -mhint-max-distance=@var{n}
+@opindex mhint-max-distance
+The encoding of the branch hint instruction limits the hint to be within
+256 instructions of the branch it is effecting.  By default, GCC makes
+sure it is within 125. 
+
+@item -msafe-hints
+@opindex msafe-hints
+Work around a hardware bug which causes the SPU to stall indefinitely.
+By default, GCC will insert the @code{hbrp} instruction to make sure
+this stall won't happen.
+
 @end table
 
 @node System V Options

gcc/haifa-sched.c

@@ -4979,4 +4979,15 @@ sched_create_empty_bb_1 (basic_block after)
   return create_empty_bb (after);
 }
 
+/* Insert PAT as an INSN into the schedule and update the necessary data
+   structures to account for it. */
+rtx
+sched_emit_insn (rtx pat)
+{
+  rtx insn = emit_insn_after (pat, last_scheduled_insn);
+  last_scheduled_insn = insn;
+  haifa_init_insn (insn);
+  return insn;
+}
+
 #endif /* INSN_SCHEDULING */

gcc/sched-int.h

@@ -1147,6 +1147,7 @@ extern void unlink_bb_notes (basic_block, basic_block);
 extern void add_block (basic_block, basic_block);
 extern rtx bb_note (basic_block);
 extern void concat_note_lists (rtx, rtx *);
+extern rtx sched_emit_insn (rtx);
 
 
 /* Types and functions in sched-rgn.c.  */