c6x.md (reserve_cycles): New attribute.
* config/c6x/c6x.md (reserve_cycles): New attribute. * config/c6x/c6x.c (c6x_sched_reorder_1): Ensure insns we predicate don't reserve functional units after the branch occurs. From-SVN: r184252
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@ -1,3 +1,9 @@
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2012-02-14 Bernd Schmidt <bernds@codesourcery.com>
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* config/c6x/c6x.md (reserve_cycles): New attribute.
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* config/c6x/c6x.c (c6x_sched_reorder_1): Ensure insns we predicate
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don't reserve functional units after the branch occurs.
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2012-02-14 Aldy Hernandez <aldyh@redhat.com>
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PR middle-end/52142
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@ -1,5 +1,5 @@
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/* Target Code for TI C6X
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Copyright (C) 2010, 2011 Free Software Foundation, Inc.
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Copyright (C) 2010, 2011, 2012 Free Software Foundation, Inc.
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Contributed by Andrew Jenner <andrew@codesourcery.com>
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Contributed by Bernd Schmidt <bernds@codesourcery.com>
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@ -4196,13 +4196,14 @@ c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
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bool is_asm = (icode < 0
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&& (GET_CODE (PATTERN (insn)) == ASM_INPUT
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|| asm_noperands (PATTERN (insn)) >= 0));
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int this_cycles;
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int this_cycles, rsrv_cycles;
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enum attr_type type;
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gcc_assert (!is_asm);
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if (icode < 0)
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continue;
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this_cycles = get_attr_cycles (insn);
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rsrv_cycles = get_attr_reserve_cycles (insn);
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type = get_attr_type (insn);
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/* Treat branches specially; there is also a hazard if two jumps
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end at the same cycle. */
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@ -4211,6 +4212,7 @@ c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
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if (clock_var + this_cycles <= first_cycle)
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continue;
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if ((first_jump > 0 && clock_var + this_cycles > second_cycle)
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|| clock_var + rsrv_cycles > first_cycle
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|| !predicate_insn (insn, first_cond, false))
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{
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memmove (ready + 1, ready, (insnp - ready) * sizeof (rtx));
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@ -1,5 +1,5 @@
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;; Machine description for TI C6X.
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;; Copyright (C) 2010, 2011 Free Software Foundation, Inc.
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;; Copyright (C) 2010, 2011, 2012 Free Software Foundation, Inc.
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;; Contributed by Andrew Jenner <andrew@codesourcery.com>
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;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
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;; Contributed by CodeSourcery.
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@ -201,6 +201,17 @@
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(eq_attr "type" "mpysp2dp") (const_int 5)]
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(const_int 1)))
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;; The number of cycles during which the instruction reserves functional
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;; units.
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(define_attr "reserve_cycles" ""
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(cond [(eq_attr "type" "cmpdp") (const_int 2)
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(eq_attr "type" "adddp") (const_int 2)
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(eq_attr "type" "mpydp") (const_int 4)
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(eq_attr "type" "mpyi") (const_int 4)
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(eq_attr "type" "mpyid") (const_int 4)
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(eq_attr "type" "mpyspdp") (const_int 2)]
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(const_int 1)))
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(define_attr "predicable" "no,yes"
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(const_string "yes"))
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