From 9e87b842277446911e7e980241bad0d4b3e24f94 Mon Sep 17 00:00:00 2001 From: Eric Botcazou Date: Fri, 14 May 2010 19:27:14 +0000 Subject: [PATCH] * tree.h (TREE_ADDRESSABLE): Remove bogus usage for FIELD_DECL. From-SVN: r159409 --- gcc/ChangeLog | 50 ++++++++++++++++++++++++++++---------------------- gcc/tree.h | 6 +----- 2 files changed, 29 insertions(+), 27 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4a71722b293..bd83bf81421 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2010-05-14 Eric Botcazou + + * tree.h (TREE_ADDRESSABLE): Remove bogus usage for FIELD_DECL. + 2010-05-14 Jason Merrill PR c++/44127 @@ -15,8 +19,8 @@ * ipa.c (enqueue_cgraph_node): Update comment; do not re-enqueue nodes already in queue. - (cgraph_remove_unreachable_nodes): Cleanup; fix problem with re-enqueueing - node. + (cgraph_remove_unreachable_nodes): Cleanup; fix problem with + re-enqueueing node. 2010-05-14 Jakub Jelinek @@ -43,11 +47,12 @@ Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit packed xor instead of packed double/packed integer xor for SSE and AVX when moving a zero value. - * config/i386/sse.md: Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL - to emit movaps instead of movapd/movdqa for SSE and AVX. - Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit packed single - logical operations i.e and, or and xor instead of packed double logical - operations for SSE and AVX. + * config/i386/sse.md: Add check for + TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit movaps instead of + movapd/movdqa for SSE and AVX. + Add check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit packed + single logical operations i.e and, or and xor instead of packed double + logical operations for SSE and AVX. * config/i386/i386-c.c: (ix86_target_macros_internal): Add PROCESSOR_BDVER1. * config/i386/driver-i386.c: Turn on -mtune=native for BDVER1. @@ -56,26 +61,27 @@ (m_BDVER1): New macro. (m_AMD_MULTIPLE): Add m_BDVER1. (x86_tune_use_leave, x86_tune_push_memory, x86_tune_unroll_strlen, - x86_tune_deep_branch_prediction, x86_tune_use_sahf, x86_tune_movx, - x86_tune_use_simode_fiop, x86_tune_promote_qimode, - x86_tune_add_esp_8, x86_tune_tune_sub_esp_4, x86_tune_sub_esp_8, - x86_tune_integer_dfmode_moves, x86_tune_partial_reg_dependency, - x86_tune_sse_partial_reg_dependency, x86_tune_sse_unaligned_load_optimal, - x86_tune_sse_unaligned_store_optimal, x86_tune_sse_typeless_stores, - x86_tune_memory_mismatch_stall, x86_tune_use_ffreep, - x86_tune_inter_unit_moves, x86_tune_inter_unit_conversions, - x86_tune_use_bt, x86_tune_pad_returns, x86_tune_slow_imul_imm32_mem, - x86_tune_slow_imul_imm8, x86_tune_fuse_cmp_and_branch): + x86_tune_deep_branch_prediction, x86_tune_use_sahf, x86_tune_movx, + x86_tune_use_simode_fiop, x86_tune_promote_qimode, + x86_tune_add_esp_8, x86_tune_tune_sub_esp_4, x86_tune_sub_esp_8, + x86_tune_integer_dfmode_moves, x86_tune_partial_reg_dependency, + x86_tune_sse_partial_reg_dependency, + x86_tune_sse_unaligned_load_optimal, + x86_tune_sse_unaligned_store_optimal, x86_tune_sse_typeless_stores, + x86_tune_memory_mismatch_stall, x86_tune_use_ffreep, + x86_tune_inter_unit_moves, x86_tune_inter_unit_conversions, + x86_tune_use_bt, x86_tune_pad_returns, x86_tune_slow_imul_imm32_mem, + x86_tune_slow_imul_imm8, x86_tune_fuse_cmp_and_branch): Enable/disable for bdver1. (processor_target_table): Add bdver1_cost. (cpu_names): Add bdver1. (override_options): Set up PROCESSOR_BDVER1 for bdver1 entry in processor_alias_table. - (ix86_expand_vector_move_misalign): Change - TARGET_SSE_UNALIGNED_MOVE_OPTIMAL to TARGET_SSE_UNALIGNED_LOAD_OPTIMAL. - Check for TARGET_SSE_UNALIGNED_STORE_OPTIMAL. - Check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit movups instead - of movupd/movdqu for SSE and AVX. + (ix86_expand_vector_move_misalign): Change. + TARGET_SSE_UNALIGNED_MOVE_OPTIMAL to TARGET_SSE_UNALIGNED_LOAD_OPTIMAL. + Check for TARGET_SSE_UNALIGNED_STORE_OPTIMAL. + Check for TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL to emit movups instead + of movupd/movdqu for SSE and AVX. (ix86_tune_issue_rate): Add PROCESSOR_BDVER1. (ix86_tune_adjust_cost): Add code for bdver1. (standard_sse_constant_opcode): Add check for diff --git a/gcc/tree.h b/gcc/tree.h index 7eed68fc1b7..a1ce99f913a 100644 --- a/gcc/tree.h +++ b/gcc/tree.h @@ -411,8 +411,7 @@ struct GTY(()) tree_common { addressable_flag: TREE_ADDRESSABLE in - VAR_DECL, PARM_DECL, RESULT_DECL, FUNCTION_DECL, FIELD_DECL - LABEL_DECL + VAR_DECL, PARM_DECL, RESULT_DECL, FUNCTION_DECL, LABEL_DECL all types CONSTRUCTOR, IDENTIFIER_NODE STMT_EXPR, it means we want the result of the enclosed expression @@ -1111,9 +1110,6 @@ extern void omp_clause_range_check_failed (const_tree, const char *, int, of this is needed. So it cannot be in a register. In a FUNCTION_DECL, nonzero means its address is needed. So it must be compiled even if it is an inline function. - In a FIELD_DECL node, it means that the programmer is permitted to - construct the address of this field. This is used for aliasing - purposes: see record_component_aliases. In CONSTRUCTOR nodes, it means object constructed must be in memory. In LABEL_DECL nodes, it means a goto for this label has been seen from a place outside all binding contours that restore stack levels.