ia64.md (prologue_allocate_stack): Block auto- generation of predicated version.

ChangeLog/

        * config/ia64/ia64.md (prologue_allocate_stack): Block auto-
        generation of predicated version.
        (epilogue_deallocate_stack): Ditto.
        (prologue_allocate_stack_pr): Add explicit predicated version.
        (epilogue_deallocate_stack_pr): Ditto.
        * config/ia64/ia64.c (ia64_single_set): Use explicit versions.

testsuite/ChangeLog/

        * gcc.target/ia64/pr52731.c: New.

From-SVN: r205692
This commit is contained in:
Kirill Yukhin 2013-12-05 07:54:43 +00:00 committed by Kirill Yukhin
parent c012dc48c0
commit 9eb8c09fda
5 changed files with 73 additions and 2 deletions

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@ -1,3 +1,12 @@
2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com>
* config/ia64/ia64.md (prologue_allocate_stack): Block auto-
generation of predicated version.
(epilogue_deallocate_stack): Ditto.
(prologue_allocate_stack_pr): Add explicit predicated version.
(epilogue_deallocate_stack_pr): Ditto.
* config/ia64/ia64.c (ia64_single_set): Use explicit version.
2013-12-05 Alan Modra <amodra@gmail.com>
* configure.ac (BUILD_CXXFLAGS) Don't use ALL_CXXFLAGS for

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@ -7159,7 +7159,9 @@ ia64_single_set (rtx insn)
switch (recog_memoized (insn))
{
case CODE_FOR_prologue_allocate_stack:
case CODE_FOR_prologue_allocate_stack_pr:
case CODE_FOR_epilogue_deallocate_stack:
case CODE_FOR_epilogue_deallocate_stack_pr:
ret = XVECEXP (x, 0, 0);
break;

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@ -4652,6 +4652,8 @@
;; This prevents the scheduler from moving the SP decrement past FP-relative
;; stack accesses. This is the same as adddi3 plus the extra set.
;; Explicit predicated version of insn needed to check by CODE_FOR_
;; in ia64_single_set, where despite of 2 sets this define_insn should be OK.
(define_insn "prologue_allocate_stack"
[(set (match_operand:DI 0 "register_operand" "=r,r,r")
@ -4664,10 +4666,31 @@
add %0 = %1, %2
adds %0 = %2, %1
addl %0 = %2, %1"
[(set_attr "itanium_class" "ialu")])
[(set_attr "itanium_class" "ialu")
(set_attr "predicable" "no")])
(define_insn "prologue_allocate_stack_pr"
[(cond_exec (match_operator 0 ("predicate_operator")
[(match_operand:BI 1 ("register_operand") ("c,c,c"))
(const_int 0)])
(parallel
[(set (match_operand:DI 2 "register_operand" "=r,r,r")
(plus:DI (match_operand:DI 3 "register_operand" "%r,r,a")
(match_operand:DI 4 "gr_reg_or_22bit_operand" "r,I,J")))
(set (match_operand:DI 5 "register_operand" "+r,r,r")
(match_dup 5))]))]
""
"@
(%J0) add %2 = %3, %4
(%J0) adds %2 = %3, %4
(%J0) addl %2 = %3, %4"
[(set_attr "itanium_class" "ialu")
(set_attr "predicable" "no")])
;; This prevents the scheduler from moving the SP restore past FP-relative
;; stack accesses. This is similar to movdi plus the extra set.
;; Explicit predicated version of insn needed to check by CODE_FOR_
;; in ia64_single_set, where despite of 2 sets this define_insn should be OK.
(define_insn "epilogue_deallocate_stack"
[(set (match_operand:DI 0 "register_operand" "=r")
@ -4675,7 +4698,21 @@
(set (match_dup 1) (match_dup 1))]
""
"mov %0 = %1"
[(set_attr "itanium_class" "ialu")])
[(set_attr "itanium_class" "ialu")
(set_attr "predicable" "no")])
(define_insn "epilogue_deallocate_stack_pr"
[(cond_exec (match_operator 0 ("predicate_operator")
[(match_operand:BI 1 ("register_operand") ("c"))
(const_int 0)])
(parallel
[(set (match_operand:DI 2 "register_operand" "=r")
(match_operand:DI 3 "register_operand" "+r"))
(set (match_dup 3) (match_dup 3))]))]
""
"(%J0) mov %2 = %3"
[(set_attr "itanium_class" "ialu")
(set_attr "predicable" "no")])
;; As USE insns aren't meaningful after reload, this is used instead
;; to prevent deleting instructions setting registers for EH handling

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@ -1,3 +1,7 @@
2013-12-05 Kirill Yukhin <kirill.yukhin@intel.com>
* gcc.target/ia64/pr52731.c: New.
2013-12-04 Jeff Law <law@redhat.com>
* gcc.dg/pr38984.c: Use -fno-isolate-erroneous-paths-dereference.

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@ -0,0 +1,19 @@
/* { dg-do compile { target ia64-*-* } } */
/* { dg-options "-O2" } */
char* area;
long int area_size;
char* base;
void fun(unsigned long int addr)
{
unsigned long int size32 = (addr + 4096 - 1) & ~(4096 - 1);
unsigned long int size = size32 * sizeof(unsigned int);
if (size > 0) {
size = (size + 1) & ~(1);
}
area_size = size;
area = base + size;
}