From 9ed52438b8ca99a0dffe74da96c2281cbc9cbb4b Mon Sep 17 00:00:00 2001
From: Tom de Vries <tdevries@suse.de>
Date: Fri, 18 Feb 2022 17:38:50 +0100
Subject: [PATCH] [nvptx] Don't skip atomic insns in nvptx_reorg_uniform_simt

In nvptx_reorg_uniform_simt we have a loop:
...
  for (insn = get_insns (); insn; insn = next)
    {
      next = NEXT_INSN (insn);
      if (!(CALL_P (insn) && nvptx_call_insn_is_syscall_p (insn))
         && !(NONJUMP_INSN_P (insn)
              && GET_CODE (PATTERN (insn)) == PARALLEL
              && get_attr_atomic (insn)))
       continue;
...
that intends to handle syscalls and atomic insns.

However, this also silently skips the atomic insn nvptx_atomic_store, which
has GET_CODE (PATTERN (insn)) == SET.

This does not cause problems, because the nvptx_atomic_store actually maps
onto a "st" insn, and therefore is not atomic and doesn't need to be handled
by nvptx_reorg_uniform_simt.

Fix this by:
- explicitly setting nvptx_atomic_store's atomic attribute to false,
- rewriting the skip condition to make sure all insn
  with atomic attribute are handled, and
- asserting that all handled insns are PARALLEL.

Tested on nvptx.

gcc/ChangeLog:

2022-02-19  Tom de Vries  <tdevries@suse.de>

	* config/nvptx/nvptx.cc (nvptx_reorg_uniform_simt): Handle all
	insns with atomic attribute.  Assert that all handled insns are
	PARALLELs.
	* config/nvptx/nvptx.md (define_insn "nvptx_atomic_store<mode>"):
	Set atomic attribute to false.

gcc/testsuite/ChangeLog:

2022-02-19  Tom de Vries  <tdevries@suse.de>

	* gcc.target/nvptx/uniform-simt-3.c: New test.
---
 gcc/config/nvptx/nvptx.cc                     | 20 +++++++++++++++----
 gcc/config/nvptx/nvptx.md                     |  2 +-
 .../gcc.target/nvptx/uniform-simt-3.c         |  4 ++++
 3 files changed, 21 insertions(+), 5 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/nvptx/uniform-simt-3.c

diff --git a/gcc/config/nvptx/nvptx.cc b/gcc/config/nvptx/nvptx.cc
index 4942f1100da..55fab3e84cb 100644
--- a/gcc/config/nvptx/nvptx.cc
+++ b/gcc/config/nvptx/nvptx.cc
@@ -3274,12 +3274,24 @@ nvptx_reorg_uniform_simt ()
   for (insn = get_insns (); insn; insn = next)
     {
       next = NEXT_INSN (insn);
-      if (!(CALL_P (insn) && nvptx_call_insn_is_syscall_p (insn))
-	  && !(NONJUMP_INSN_P (insn)
-	       && GET_CODE (PATTERN (insn)) == PARALLEL
-	       && get_attr_atomic (insn)))
+
+      /* Skip NOTE, USE, etc.  */
+      if (!INSN_P (insn) || recog_memoized (insn) == -1)
 	continue;
+
+      if (CALL_P (insn) && nvptx_call_insn_is_syscall_p (insn))
+	{
+	  /* Handle syscall.  */
+	}
+      else if (get_attr_atomic (insn))
+	{
+	  /* Handle atomic insn.  */
+	}
+      else
+	continue;
+
       rtx pat = PATTERN (insn);
+      gcc_assert (GET_CODE (pat) == PARALLEL);
       rtx master = nvptx_get_unisimt_master ();
       bool shuffle_p = false;
       for (int i = 0; i < XVECLEN (pat, 0); i++)
diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md
index 4c378ec6ecb..132ef2f1d34 100644
--- a/gcc/config/nvptx/nvptx.md
+++ b/gcc/config/nvptx/nvptx.md
@@ -2097,7 +2097,7 @@
       = "%.\tst%A0.b%T0\t%0, %1;";
     return nvptx_output_atomic_insn (t, operands, 0, 2);
   }
-  [(set_attr "atomic" "true")])
+  [(set_attr "atomic" "false")]) ;; Note: st is not an atomic insn.
 
 (define_insn "atomic_fetch_add<mode>"
   [(set (match_operand:SDIM 1 "memory_operand" "+m")
diff --git a/gcc/testsuite/gcc.target/nvptx/uniform-simt-3.c b/gcc/testsuite/gcc.target/nvptx/uniform-simt-3.c
new file mode 100644
index 00000000000..532fa825161
--- /dev/null
+++ b/gcc/testsuite/gcc.target/nvptx/uniform-simt-3.c
@@ -0,0 +1,4 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -muniform-simt -misa=sm_75" } */
+
+#include "atomic-store-2.c"