re PR rtl-optimization/67218 (Combine incorrectly folds (double) (float) (unsigned))
gcc/ PR rtl-optimization/67218 * simplify-rtx.c (exact_int_to_float_conversion_p): New function. (simplify_unary_operation_1): Use it. gcc/testsuite/ PR rtl-optimization/67218 * gcc.c-torture/execute/ieee/pr67218.c, gcc.target/aarch64/fcvt_int_float_double1.c, gcc.target/aarch64/fcvt_int_float_double2.c, gcc.target/aarch64/fcvt_int_float_double3.c, gcc.target/aarch64/fcvt_int_float_double4.c, gcc.target/aarch64/fcvt_uint_float_double1.c, gcc.target/aarch64/fcvt_uint_float_double2.c, gcc.target/aarch64/fcvt_uint_float_double3.c, gcc.target/aarch64/fcvt_uint_float_double4.c: New tests. From-SVN: r226987
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@ -1,3 +1,9 @@
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2015-08-18 Richard Sandiford <richard.sandiford@arm.com>
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PR rtl-optimization/67218
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* simplify-rtx.c (exact_int_to_float_conversion_p): New function.
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(simplify_unary_operation_1): Use it.
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2015-08-18 Marek Polacek <polacek@redhat.com>
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PR middle-end/67222
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@ -829,6 +829,32 @@ simplify_unary_operation (enum rtx_code code, machine_mode mode,
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return simplify_unary_operation_1 (code, mode, op);
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}
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/* Return true if FLOAT or UNSIGNED_FLOAT operation OP is known
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to be exact. */
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static bool
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exact_int_to_float_conversion_p (const_rtx op)
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{
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int out_bits = significand_size (GET_MODE_INNER (GET_MODE (op)));
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machine_mode op0_mode = GET_MODE (XEXP (op, 0));
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/* Constants shouldn't reach here. */
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gcc_assert (op0_mode != VOIDmode);
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int in_prec = GET_MODE_UNIT_PRECISION (op0_mode);
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int in_bits = in_prec;
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if (HWI_COMPUTABLE_MODE_P (op0_mode))
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{
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unsigned HOST_WIDE_INT nonzero = nonzero_bits (XEXP (op, 0), op0_mode);
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if (GET_CODE (op) == FLOAT)
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in_bits -= num_sign_bit_copies (XEXP (op, 0), op0_mode);
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else if (GET_CODE (op) == UNSIGNED_FLOAT)
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in_bits = wi::min_precision (wi::uhwi (nonzero, in_prec), UNSIGNED);
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else
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gcc_unreachable ();
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in_bits -= wi::ctz (wi::uhwi (nonzero, in_prec));
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}
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return in_bits <= out_bits;
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}
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/* Perform some simplifications we can do even if the operands
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aren't constant. */
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static rtx
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@ -1190,11 +1216,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
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/* (float_truncate (float x)) is (float x) */
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if ((GET_CODE (op) == FLOAT || GET_CODE (op) == UNSIGNED_FLOAT)
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&& (flag_unsafe_math_optimizations
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|| (SCALAR_FLOAT_MODE_P (GET_MODE (op))
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&& ((unsigned)significand_size (GET_MODE (op))
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>= (GET_MODE_PRECISION (GET_MODE (XEXP (op, 0)))
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- num_sign_bit_copies (XEXP (op, 0),
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GET_MODE (XEXP (op, 0))))))))
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|| exact_int_to_float_conversion_p (op)))
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return simplify_gen_unary (GET_CODE (op), mode,
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XEXP (op, 0),
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GET_MODE (XEXP (op, 0)));
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@ -1227,11 +1249,7 @@ simplify_unary_operation_1 (enum rtx_code code, machine_mode mode, rtx op)
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*/
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if (GET_CODE (op) == FLOAT_EXTEND
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|| ((GET_CODE (op) == FLOAT || GET_CODE (op) == UNSIGNED_FLOAT)
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&& SCALAR_FLOAT_MODE_P (GET_MODE (op))
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&& ((unsigned)significand_size (GET_MODE (op))
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>= (GET_MODE_PRECISION (GET_MODE (XEXP (op, 0)))
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- num_sign_bit_copies (XEXP (op, 0),
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GET_MODE (XEXP (op, 0)))))))
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&& exact_int_to_float_conversion_p (op)))
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return simplify_gen_unary (GET_CODE (op), mode,
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XEXP (op, 0),
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GET_MODE (XEXP (op, 0)));
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@ -1,3 +1,16 @@
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2015-08-18 Richard Sandiford <richard.sandiford@arm.com>
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PR rtl-optimization/67218
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* gcc.c-torture/execute/ieee/pr67218.c,
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gcc.target/aarch64/fcvt_int_float_double1.c,
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gcc.target/aarch64/fcvt_int_float_double2.c,
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gcc.target/aarch64/fcvt_int_float_double3.c,
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gcc.target/aarch64/fcvt_int_float_double4.c,
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gcc.target/aarch64/fcvt_uint_float_double1.c,
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gcc.target/aarch64/fcvt_uint_float_double2.c,
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gcc.target/aarch64/fcvt_uint_float_double3.c,
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gcc.target/aarch64/fcvt_uint_float_double4.c: New tests.
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2015-08-18 Matthew Wahab <matthew.wahab@arm.com>
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* gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Adjust
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@ -0,0 +1,15 @@
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extern void abort (void) __attribute__ ((noreturn));
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double __attribute__ ((noinline, noclone))
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foo (unsigned int x)
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{
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return (double) (float) (x | 0xffff0000);
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}
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int
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main ()
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{
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if (foo (1) != 0x1.fffep31)
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abort ();
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return 0;
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}
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@ -0,0 +1,10 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (int x)
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{
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return (double) (float) (x | (int) 0xff000000);
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}
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/* { dg-final { scan-assembler {\tscvtf\td0, w[0-9]*} } } */
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@ -0,0 +1,11 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (int x)
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{
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return (double) (float) (x | (int) 0xfe000000);
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}
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/* { dg-final { scan-assembler {\tscvtf\ts[0-9]*, w[0-9]*} } } */
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/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
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@ -0,0 +1,10 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (int x)
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{
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return (double) (float) ((x & -16) | (int) 0xf0000000);
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}
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/* { dg-final { scan-assembler {\tscvtf\td0, w[0-9]*} } } */
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@ -0,0 +1,11 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (int x)
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{
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return (double) (float) ((x & -16) | (int) 0xfe00000);
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}
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/* { dg-final { scan-assembler {\tscvtf\ts[0-9]*, w[0-9]*} } } */
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/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (unsigned int x)
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{
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return (double) (float) (x & 0xffffff);
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}
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/* { dg-final { scan-assembler {\t[su]cvtf\td0, w[0-9]*} } } */
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@ -0,0 +1,11 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (unsigned int x)
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{
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return (double) (float) (x & 0x1ffffff);
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}
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/* { dg-final { scan-assembler {\t[su]cvtf\ts[0-9]*, w[0-9]*} } } */
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/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (unsigned int x)
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{
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return (double) (float) (x & 0xffffff00);
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}
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/* { dg-final { scan-assembler {\tucvtf\td0, w[0-9]*} } } */
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@ -0,0 +1,11 @@
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/* { dg-do compile } */
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/* { dg-options "-O2" } */
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double
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foo (unsigned int x)
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{
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return (double) (float) (x & 0xffffff80);
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}
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/* { dg-final { scan-assembler {\tucvtf\ts[0-9]*, w[0-9]*} } } */
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/* { dg-final { scan-assembler {\tfcvt\td0, s[0-9]*} } } */
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