re PR target/65167 (ICE: in assign_by_spills, at lra-assigns.c:1383 (unable to find a register to spill) with -O -fschedule-insns -fcheck-pointer-bounds -mmpx)

gcc/

	PR target/65167
	* gcc/config/i386/i386.c (ix86_function_arg_regno_p): Support
	bounds registers.
	(avoid_func_arg_motion): Add dependencies for BNDSTX insns.

gcc/testsuite/

	PR target/65167
	* gcc.target/i386/pr65167.c: New.

From-SVN: r220970
This commit is contained in:
Ilya Enkovich 2015-02-25 15:05:48 +00:00 committed by Ilya Enkovich
parent eeaccc0775
commit a2273e72f3
4 changed files with 36 additions and 0 deletions

View File

@ -1,3 +1,10 @@
2015-02-25 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65167
* gcc/config/i386/i386.c (ix86_function_arg_regno_p): Support
bounds registers.
(avoid_func_arg_motion): Add dependencies for BNDSTX insns.
2015-02-25 Alan Lawrence <alan.lawrence@arm.com>
PR target/64997

View File

@ -6120,6 +6120,9 @@ ix86_function_arg_regno_p (int regno)
int i;
const int *parm_regs;
if (TARGET_MPX && BND_REGNO_P (regno))
return true;
if (!TARGET_64BIT)
{
if (TARGET_MACHO)
@ -26898,6 +26901,16 @@ avoid_func_arg_motion (rtx_insn *first_arg, rtx_insn *insn)
rtx set;
rtx tmp;
/* Add anti dependencies for bounds stores. */
if (INSN_P (insn)
&& GET_CODE (PATTERN (insn)) == PARALLEL
&& GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == UNSPEC
&& XINT (XVECEXP (PATTERN (insn), 0, 0), 1) == UNSPEC_BNDSTX)
{
add_dependence (first_arg, insn, REG_DEP_ANTI);
return;
}
set = single_set (insn);
if (!set)
return;

View File

@ -1,3 +1,8 @@
2015-02-25 Ilya Enkovich <ilya.enkovich@intel.com>
PR target/65167
* gcc.target/i386/pr65167.c: New.
2015-02-25 Kai Tietz <ktietz@redhat.com>
PR tree-optimization/61917

View File

@ -0,0 +1,11 @@
/* { dg-do compile } */
/* { dg-require-effective-target mpx } */
/* { dg-options "-O -fschedule-insns -fcheck-pointer-bounds -mmpx" } */
void bar(int *a, int *b, int *c, int *d, int *e, int *f);
int foo (int *a, int *b, int *c, int *d, int *e, int *f)
{
bar (a, b, c, d, e, f);
return *f;
}