re PR target/65167 (ICE: in assign_by_spills, at lra-assigns.c:1383 (unable to find a register to spill) with -O -fschedule-insns -fcheck-pointer-bounds -mmpx)
gcc/ PR target/65167 * gcc/config/i386/i386.c (ix86_function_arg_regno_p): Support bounds registers. (avoid_func_arg_motion): Add dependencies for BNDSTX insns. gcc/testsuite/ PR target/65167 * gcc.target/i386/pr65167.c: New. From-SVN: r220970
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@ -1,3 +1,10 @@
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2015-02-25 Ilya Enkovich <ilya.enkovich@intel.com>
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PR target/65167
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* gcc/config/i386/i386.c (ix86_function_arg_regno_p): Support
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bounds registers.
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(avoid_func_arg_motion): Add dependencies for BNDSTX insns.
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2015-02-25 Alan Lawrence <alan.lawrence@arm.com>
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PR target/64997
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@ -6120,6 +6120,9 @@ ix86_function_arg_regno_p (int regno)
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int i;
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const int *parm_regs;
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if (TARGET_MPX && BND_REGNO_P (regno))
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return true;
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if (!TARGET_64BIT)
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{
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if (TARGET_MACHO)
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@ -26898,6 +26901,16 @@ avoid_func_arg_motion (rtx_insn *first_arg, rtx_insn *insn)
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rtx set;
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rtx tmp;
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/* Add anti dependencies for bounds stores. */
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if (INSN_P (insn)
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&& GET_CODE (PATTERN (insn)) == PARALLEL
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&& GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == UNSPEC
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&& XINT (XVECEXP (PATTERN (insn), 0, 0), 1) == UNSPEC_BNDSTX)
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{
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add_dependence (first_arg, insn, REG_DEP_ANTI);
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return;
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}
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set = single_set (insn);
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if (!set)
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return;
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@ -1,3 +1,8 @@
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2015-02-25 Ilya Enkovich <ilya.enkovich@intel.com>
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PR target/65167
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* gcc.target/i386/pr65167.c: New.
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2015-02-25 Kai Tietz <ktietz@redhat.com>
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PR tree-optimization/61917
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11
gcc/testsuite/gcc.target/i386/pr65167.c
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11
gcc/testsuite/gcc.target/i386/pr65167.c
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/* { dg-do compile } */
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/* { dg-require-effective-target mpx } */
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/* { dg-options "-O -fschedule-insns -fcheck-pointer-bounds -mmpx" } */
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void bar(int *a, int *b, int *c, int *d, int *e, int *f);
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int foo (int *a, int *b, int *c, int *d, int *e, int *f)
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{
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bar (a, b, c, d, e, f);
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return *f;
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}
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