diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c377978a5c4..1fd1a9b6bf5 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -1465,7 +1465,7 @@
 ;; targets without our curiosities, and it is just as easy to represent
 ;; this differently.
 
-(define_insn "pushsi2"
+(define_insn "*pushsi2"
   [(set (match_operand:SI 0 "push_operand" "=<")
 	(match_operand:SI 1 "general_no_elim_operand" "ri*m"))]
   ""
@@ -1574,7 +1574,7 @@
   ""
   "ix86_expand_move (HImode, operands); DONE;")
 
-(define_insn "pushhi2"
+(define_insn "*pushhi2"
   [(set (match_operand:HI 0 "push_operand" "=<,<")
 	(match_operand:HI 1 "general_no_elim_operand" "n,r*m"))]
   ""
@@ -1584,7 +1584,7 @@
   [(set_attr "type" "push")
    (set_attr "mode" "HI")])
 
-(define_insn "pophi1"
+(define_insn "*pophi1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=r*m")
 	(mem:HI (reg:SI 7)))
    (set (reg:SI 7)
@@ -1711,7 +1711,7 @@
 ;; "push a byte".  But actually we use pushw, which has the effect
 ;; of rounding the amount pushed up to a halfword.
 
-(define_insn "pushqi2"
+(define_insn "*pushqi2"
   [(set (match_operand:QI 0 "push_operand" "=<,<")
 	(match_operand:QI 1 "nonmemory_no_elim_operand" "n,r"))]
   ""
@@ -1721,7 +1721,7 @@
   [(set_attr "type" "push")
    (set_attr "mode" "HI")])
 
-(define_insn "popqi1"
+(define_insn "*popqi1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=r*m")
 	(mem:QI (reg:SI 7)))
    (set (reg:SI 7)
@@ -2120,7 +2120,7 @@
 	(match_dup 1))]
   "operands[1] = get_pool_constant (XEXP (operands[1], 0));")
 
-(define_insn "swapsf"
+(define_insn "*swapsf"
   [(set (match_operand:SF 0 "register_operand" "+f")
 	(match_operand:SF 1 "register_operand" "+f"))
    (set (match_dup 1)
@@ -2347,7 +2347,7 @@
 	(match_dup 1))]
   "operands[1] = get_pool_constant (XEXP (operands[1], 0));")
 
-(define_insn "swapdf"
+(define_insn "*swapdf"
   [(set (match_operand:DF 0 "register_operand" "+f")
 	(match_operand:DF 1 "register_operand" "+f"))
    (set (match_dup 1)
@@ -4657,7 +4657,7 @@
    (set_attr "length_immediate" "0")
    (set_attr "mode" "SI")])
 
-(define_insn "umulsi3_highpart"
+(define_insn "*umulsi3_highpart"
   [(set (match_operand:SI 0 "register_operand" "=d")
 	(truncate:SI
 	  (lshiftrt:DI
@@ -4675,7 +4675,7 @@
    (set_attr "length_immediate" "0")
    (set_attr "mode" "SI")])
 
-(define_insn "smulsi3_highpart"
+(define_insn "*smulsi3_highpart"
   [(set (match_operand:SI 0 "register_operand" "=d")
 	(truncate:SI
 	  (lshiftrt:DI
@@ -5007,7 +5007,7 @@
    (set_attr "mode" "QI")
    (set_attr "pent_pair" "uv,np,uv")])
 
-(define_insn "testqi_ccno_1"
+(define_insn "*testqi_ccno_1"
   [(set (reg:CCNO 17)
         (compare:CCNO (and:QI (match_operand:QI 0 "nonimmediate_operand" "%*a,q,qm,r")
 			      (match_operand:QI 1 "nonmemory_operand" "n,n,qn,n"))
@@ -5616,7 +5616,7 @@
   [(set_attr "type" "alu")
    (set_attr "mode" "QI,QI,SI")])
 
-(define_insn "xorqi_ext_1"
+(define_insn "*xorqi_ext_1"
   [(set (zero_extract:SI (match_operand 0 "ext_register_operand" "=q")
 			 (const_int 8)
 			 (const_int 8))