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[multiple changes] 

2011-06-13  David Edelsohn  <dje.gcc@gmail.com>

        * config/rs6000/rs6000.md (movdi_mfpgpr): Remove POWER mnemonic.
        (movdi_internal64): Same.

2011-06-13  Edmar Wienskoski  <edmar@freescale.com>

        * config/rs6000/rs6000.md (save_gpregs_<mode>): Replaced pattern
        with a set of similar patterns, where the MATCH_OPERAND for the
        function argument is replaced with individual references to hardware
        registers.
        (save_fpregs_<mode>): Ditto
        (restore_gpregs_<mode>): Ditto
        (return_and_restore_gpregs_<mode>): Ditto
        (return_and_restore_fpregs_<mode>): Ditto
        (return_and_restore_fpregs_aix_<mode>): Ditto

From-SVN: r174997
This commit is contained in:
David Edelsohn 2011-06-13 14:24:39 -04:00
parent 8b160d504a
commit a45fe02fe7
2 changed files with 210 additions and 26 deletions
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17
gcc/ChangeLog
View File

@ -1,3 +1,20 @@
2011-06-13 David Edelsohn <dje.gcc@gmail.com>
* config/rs6000/rs6000.md (movdi_mfpgpr): Remove POWER mnemonic.
(movdi_internal64): Same.
2011-06-13 Edmar Wienskoski <edmar@freescale.com>
* config/rs6000/rs6000.md (save_gpregs_<mode>): Replaced pattern
with a set of similar patterns, where the MATCH_OPERAND for the
function argument is replaced with individual references to hardware
registers.
(save_fpregs_<mode>): Ditto
(restore_gpregs_<mode>): Ditto
(return_and_restore_gpregs_<mode>): Ditto
(return_and_restore_fpregs_<mode>): Ditto
(return_and_restore_fpregs_aix_<mode>): Ditto
2011-06-13 Jan Hubicka <jh@suse.cz> 2011-06-13 Jan Hubicka <jh@suse.cz>
* ipa-utils.c (postorder_stack): New structure. * ipa-utils.c (postorder_stack): New structure.

219
gcc/config/rs6000/rs6000.md
View File

@ -10133,7 +10133,7 @@
li %0,%1 li %0,%1
lis %0,%v1 lis %0,%v1
# #
{cal|la} %0,%a1 la %0,%a1
fmr %0,%1 fmr %0,%1
lfd%U1%X1 %0,%1 lfd%U1%X1 %0,%1
stfd%U0%X0 %1,%0 stfd%U0%X0 %1,%0
@ -10158,7 +10158,7 @@
li %0,%1 li %0,%1
lis %0,%v1 lis %0,%v1
# #
{cal|la} %0,%a1 la %0,%a1
fmr %0,%1 fmr %0,%1
lfd%U1%X1 %0,%1 lfd%U1%X1 %0,%1
stfd%U0%X0 %1,%0 stfd%U0%X0 %1,%0
@ -15889,25 +15889,88 @@
"{stm|stmw} %2,%1" "{stm|stmw} %2,%1"
[(set_attr "type" "store_ux")]) [(set_attr "type" "store_ux")])
(define_insn "*save_gpregs_<mode>" ; The following comment applies to:
; save_gpregs_*
; save_fpregs_*
; restore_gpregs*
; return_and_restore_gpregs*
; return_and_restore_fpregs*
; return_and_restore_fpregs_aix*
;
; The out-of-line save / restore functions expects one input argument.
; Since those are not standard call_insn's, we must avoid using
; MATCH_OPERAND for that argument. That way the register rename
; optimization will not try to rename this register.
; Each pattern is repeated for each possible register number used in
; various ABIs (r11, r1, and for some functions r12)
(define_insn "*save_gpregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand" [(match_parallel 0 "any_parallel_operand"
[(clobber (reg:P 65)) [(clobber (reg:P 65))
(use (match_operand:P 1 "symbol_ref_operand" "s")) (use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (match_operand:P 2 "gpc_reg_operand" "r")) (use (reg:P 11))
(set (match_operand:P 3 "memory_operand" "=m") (set (match_operand:P 2 "memory_operand" "=m")
(match_operand:P 4 "gpc_reg_operand" "r"))])] (match_operand:P 3 "gpc_reg_operand" "r"))])]
"" ""
"bl %1" "bl %1"
[(set_attr "type" "branch") [(set_attr "type" "branch")
(set_attr "length" "4")]) (set_attr "length" "4")])
(define_insn "*save_fpregs_<mode>" (define_insn "*save_gpregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand" [(match_parallel 0 "any_parallel_operand"
[(clobber (reg:P 65)) [(clobber (reg:P 65))
(use (match_operand:P 1 "symbol_ref_operand" "s")) (use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (match_operand:P 2 "gpc_reg_operand" "r")) (use (reg:P 12))
(set (match_operand:DF 3 "memory_operand" "=m") (set (match_operand:P 2 "memory_operand" "=m")
(match_operand:DF 4 "gpc_reg_operand" "d"))])] (match_operand:P 3 "gpc_reg_operand" "r"))])]
""
"bl %1"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*save_gpregs_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
[(clobber (reg:P 65))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:P 2 "memory_operand" "=m")
(match_operand:P 3 "gpc_reg_operand" "r"))])]
""
"bl %1"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*save_fpregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand"
[(clobber (reg:P 65))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 11))
(set (match_operand:DF 2 "memory_operand" "=m")
(match_operand:DF 3 "gpc_reg_operand" "d"))])]
""
"bl %1"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*save_fpregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand"
[(clobber (reg:P 65))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 12))
(set (match_operand:DF 2 "memory_operand" "=m")
(match_operand:DF 3 "gpc_reg_operand" "d"))])]
""
"bl %1"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*save_fpregs_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
[(clobber (reg:P 65))
(use (match_operand:P 1 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:DF 2 "memory_operand" "=m")
(match_operand:DF 3 "gpc_reg_operand" "d"))])]
"" ""
"bl %1" "bl %1"
[(set_attr "type" "branch") [(set_attr "type" "branch")
@ -16005,52 +16068,156 @@
; FIXME: This would probably be somewhat simpler if the Cygnus sibcall ; FIXME: This would probably be somewhat simpler if the Cygnus sibcall
; stuff was in GCC. Oh, and "any_parallel_operand" is a bit flexible... ; stuff was in GCC. Oh, and "any_parallel_operand" is a bit flexible...
(define_insn "*restore_gpregs_<mode>" ; The following comment applies to:
; save_gpregs_*
; save_fpregs_*
; restore_gpregs*
; return_and_restore_gpregs*
; return_and_restore_fpregs*
; return_and_restore_fpregs_aix*
;
; The out-of-line save / restore functions expects one input argument.
; Since those are not standard call_insn's, we must avoid using
; MATCH_OPERAND for that argument. That way the register rename
; optimization will not try to rename this register.
; Each pattern is repeated for each possible register number used in
; various ABIs (r11, r1, and for some functions r12)
(define_insn "*restore_gpregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand" [(match_parallel 0 "any_parallel_operand"
[(clobber (match_operand:P 1 "register_operand" "=l")) [(clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s")) (use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (match_operand:P 3 "gpc_reg_operand" "r")) (use (reg:P 11))
(set (match_operand:P 4 "gpc_reg_operand" "=r") (set (match_operand:P 3 "gpc_reg_operand" "=r")
(match_operand:P 5 "memory_operand" "m"))])] (match_operand:P 4 "memory_operand" "m"))])]
"" ""
"bl %2" "bl %2"
[(set_attr "type" "branch") [(set_attr "type" "branch")
(set_attr "length" "4")]) (set_attr "length" "4")])
(define_insn "*return_and_restore_gpregs_<mode>" (define_insn "*restore_gpregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand"
[(clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (reg:P 12))
(set (match_operand:P 3 "gpc_reg_operand" "=r")
(match_operand:P 4 "memory_operand" "m"))])]
""
"bl %2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*restore_gpregs_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
[(clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:P 3 "gpc_reg_operand" "=r")
(match_operand:P 4 "memory_operand" "m"))])]
""
"bl %2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*return_and_restore_gpregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand" [(match_parallel 0 "any_parallel_operand"
[(return) [(return)
(clobber (match_operand:P 1 "register_operand" "=l")) (clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s")) (use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (match_operand:P 3 "gpc_reg_operand" "r")) (use (reg:P 11))
(set (match_operand:P 4 "gpc_reg_operand" "=r") (set (match_operand:P 3 "gpc_reg_operand" "=r")
(match_operand:P 5 "memory_operand" "m"))])] (match_operand:P 4 "memory_operand" "m"))])]
"" ""
"b %2" "b %2"
[(set_attr "type" "branch") [(set_attr "type" "branch")
(set_attr "length" "4")]) (set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_<mode>" (define_insn "*return_and_restore_gpregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand" [(match_parallel 0 "any_parallel_operand"
[(return) [(return)
(clobber (match_operand:P 1 "register_operand" "=l")) (clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s")) (use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (match_operand:P 3 "gpc_reg_operand" "r")) (use (reg:P 12))
(set (match_operand:DF 4 "gpc_reg_operand" "=d") (set (match_operand:P 3 "gpc_reg_operand" "=r")
(match_operand:DF 5 "memory_operand" "m"))])] (match_operand:P 4 "memory_operand" "m"))])]
"" ""
"b %2" "b %2"
[(set_attr "type" "branch") [(set_attr "type" "branch")
(set_attr "length" "4")]) (set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_aix_<mode>" (define_insn "*return_and_restore_gpregs_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
[(return)
(clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:P 3 "gpc_reg_operand" "=r")
(match_operand:P 4 "memory_operand" "m"))])]
""
"b %2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_<mode>_r11"
[(match_parallel 0 "any_parallel_operand"
[(return)
(clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (reg:P 11))
(set (match_operand:DF 3 "gpc_reg_operand" "=d")
(match_operand:DF 4 "memory_operand" "m"))])]
""
"b %2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_<mode>_r12"
[(match_parallel 0 "any_parallel_operand"
[(return)
(clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (reg:P 12))
(set (match_operand:DF 3 "gpc_reg_operand" "=d")
(match_operand:DF 4 "memory_operand" "m"))])]
""
"b %2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
[(return)
(clobber (match_operand:P 1 "register_operand" "=l"))
(use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:DF 3 "gpc_reg_operand" "=d")
(match_operand:DF 4 "memory_operand" "m"))])]
""
"b %2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_aix_<mode>_r11"
[(match_parallel 0 "any_parallel_operand" [(match_parallel 0 "any_parallel_operand"
[(return) [(return)
(use (match_operand:P 1 "register_operand" "l")) (use (match_operand:P 1 "register_operand" "l"))
(use (match_operand:P 2 "symbol_ref_operand" "s")) (use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (match_operand:P 3 "gpc_reg_operand" "r")) (use (reg:P 11))
(set (match_operand:DF 4 "gpc_reg_operand" "=d") (set (match_operand:DF 3 "gpc_reg_operand" "=d")
(match_operand:DF 5 "memory_operand" "m"))])] (match_operand:DF 4 "memory_operand" "m"))])]
""
"b %2"
[(set_attr "type" "branch")
(set_attr "length" "4")])
(define_insn "*return_and_restore_fpregs_aix_<mode>_r1"
[(match_parallel 0 "any_parallel_operand"
[(return)
(use (match_operand:P 1 "register_operand" "l"))
(use (match_operand:P 2 "symbol_ref_operand" "s"))
(use (reg:P 1))
(set (match_operand:DF 3 "gpc_reg_operand" "=d")
(match_operand:DF 4 "memory_operand" "m"))])]
"" ""
"b %2" "b %2"
[(set_attr "type" "branch") [(set_attr "type" "branch")