From a46c7e85d8324ee8946c255fbd1a547a6b4d2b8c Mon Sep 17 00:00:00 2001 From: Richard Earnshaw Date: Sat, 15 Apr 2000 15:00:19 +0000 Subject: [PATCH] * arm.md (movhi): REGNO_POINTER_ALIGN is now bits. From-SVN: r33163 --- gcc/ChangeLog | 2 ++ gcc/config/arm/arm.md | 4 ++-- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7c9b9347d7c..7d752a671b3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -3,6 +3,8 @@ * emit-rtl.c (unshare_all_rtl_again): Unmark everything, then call unshare_all_rtl. + * arm.md (movhi): REGNO_POINTER_ALIGN is now bits. + Fri Apr 14 16:58:45 2000 Jim Wilson * config/ia64/lib1funcs.asm (__divdi3, __moddi3, __udivdi3, __umoddi3): diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index e67f133fcef..f83c0e2aaa7 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4193,7 +4193,7 @@ && GET_CODE (offset = XEXP (base, 1)) == CONST_INT && ((INTVAL(offset) & 1) != 1) && GET_CODE (base = XEXP (base, 0)) == REG)) - && REGNO_POINTER_ALIGN (REGNO (base)) >= 4) + && REGNO_POINTER_ALIGN (REGNO (base)) >= 32) { HOST_WIDE_INT new_offset = INTVAL (offset) & ~3; rtx new; @@ -4226,7 +4226,7 @@ || (GET_CODE (base) == PLUS && GET_CODE (offset = XEXP (base, 1)) == CONST_INT && GET_CODE (base = XEXP (base, 0)) == REG)) - && REGNO_POINTER_ALIGN (REGNO (base)) >= 4) + && REGNO_POINTER_ALIGN (REGNO (base)) >= 32) { rtx reg = gen_reg_rtx (SImode); rtx new;