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re PR bootstrap/12371 ([m68k-linux] bootstrap error in make compare) 

2004-03-10  Roman Zippel  <zippel@linux-m68k.org>

        PR bootstrap/12371
        * config/m68k/m68k.h (FIXED_REGISTERS): Add arg pointer.
        (CALL_USED_REGISTERS): Likewise.
        (REG_CLASS_CONTENTS): Likewise.
        (REG_ALLOC_ORDER): New.
        (REGNO_REG_CLASS): Use regno_reg_class.
        * config/m68k/m68k.c: Add regno_reg_class array.

From-SVN: r79221
This commit is contained in:
Roman Zippel 2004-03-10 05:07:45 +00:00 committed by Andrew Pinski
parent 9aec7fb4a9
commit a4e9467d73
3 changed files with 44 additions and 7 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2004-03-10 Roman Zippel <zippel@linux-m68k.org>
PR bootstrap/12371
* config/m68k/m68k.h (FIXED_REGISTERS): Add arg pointer.
(CALL_USED_REGISTERS): Likewise.
(REG_CLASS_CONTENTS): Likewise.
(REG_ALLOC_ORDER): New.
(REGNO_REG_CLASS): Use regno_reg_class.
* config/m68k/m68k.c: Add regno_reg_class array.
2004-03-09 Steve Ellcey <sje@cup.hp.com>
* config/ia64/ia64.md (divsi3): Fix algorithm.

12
gcc/config/m68k/m68k.c
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@ -44,6 +44,18 @@ Boston, MA 02111-1307, USA. */
#include "debug.h"
#include "flags.h"
enum reg_class regno_reg_class[] =
{
DATA_REGS, DATA_REGS, DATA_REGS, DATA_REGS,
DATA_REGS, DATA_REGS, DATA_REGS, DATA_REGS,
ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
FP_REGS, FP_REGS, FP_REGS, FP_REGS,
FP_REGS, FP_REGS, FP_REGS, FP_REGS,
ADDR_REGS
};
/* The ASM_DOT macro allows easy string pasting to handle the differences
between MOTOROLA and MIT syntaxes in asm_fprintf(), which doesn't
support the %. option. */

29
gcc/config/m68k/m68k.h
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@ -486,7 +486,10 @@ extern int target_flags;
\
/* Floating point registers \
(if available). */ \
0, 0, 0, 0, 0, 0, 0, 0 }
0, 0, 0, 0, 0, 0, 0, 0, \
\
/* Arg pointer. */ \
1 }
/* 1 for registers not available across function calls.
These must include the FIXED_REGISTERS and also any
@ -497,7 +500,18 @@ extern int target_flags;
#define CALL_USED_REGISTERS \
{1, 1, 0, 0, 0, 0, 0, 0, \
1, 1, 0, 0, 0, 0, 0, 1, \
1, 1, 0, 0, 0, 0, 0, 0 }
1, 1, 0, 0, 0, 0, 0, 0, 1 }
#define REG_ALLOC_ORDER \
{ /* d0/d1/a0/a1 */ \
0, 1, 8, 9, \
/* d2-d7 */ \
2, 3, 4, 5, 6, 7, \
/* a2-a7/arg */ \
10, 11, 12, 13, 14, 15, 24, \
/* fp0-fp7 */ \
16, 17, 18, 19, 20, 21, 22, 23\
}
/* Make sure everything's fine if we *don't* have a given processor.
@ -636,12 +650,12 @@ enum reg_class {
{ \
{0x00000000}, /* NO_REGS */ \
{0x000000ff}, /* DATA_REGS */ \
{0x0000ff00}, /* ADDR_REGS */ \
{0x0100ff00}, /* ADDR_REGS */ \
{0x00ff0000}, /* FP_REGS */ \
{0x0000ffff}, /* GENERAL_REGS */ \
{0x0100ffff}, /* GENERAL_REGS */ \
{0x00ff00ff}, /* DATA_OR_FP_REGS */ \
{0x00ffff00}, /* ADDR_OR_FP_REGS */ \
{0x00ffffff}, /* ALL_REGS */ \
{0x01ffff00}, /* ADDR_OR_FP_REGS */ \
{0x01ffffff}, /* ALL_REGS */ \
}
/* The same information, inverted:
@ -649,7 +663,8 @@ enum reg_class {
reg number REGNO. This could be a conditional expression
or could index an array. */
#define REGNO_REG_CLASS(REGNO) (((REGNO)>>3)+1)
extern enum reg_class regno_reg_class[];
#define REGNO_REG_CLASS(REGNO) (regno_reg_class[(REGNO)])
/* The class value for index registers, and the one for base regs. */