Use PLI to load up large constants if -mcpu=future.
2019-12-17 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the constant can be loaded with PLI if -mcpu=future. * config/rs6000/rs6000.md (movdi_internal64): Add alternative to use PLI to load up 34-bit constants if -mcpu=future. From-SVN: r279474
This commit is contained in:
parent
4f05d85a22
commit
a50e038893
@ -1,3 +1,10 @@
|
|||||||
|
2019-12-17 Michael Meissner <meissner@linux.ibm.com>
|
||||||
|
|
||||||
|
* config/rs6000/rs6000.c (num_insns_constant_gpr): Return 1 if the
|
||||||
|
constant can be loaded with PLI if -mcpu=future.
|
||||||
|
* config/rs6000/rs6000.md (movdi_internal64): Add alternative to
|
||||||
|
use PLI to load up 34-bit constants if -mcpu=future.
|
||||||
|
|
||||||
2019-12-17 Jakub Jelinek <jakub@redhat.com>
|
2019-12-17 Jakub Jelinek <jakub@redhat.com>
|
||||||
|
|
||||||
PR target/92841
|
PR target/92841
|
||||||
|
@ -5565,6 +5565,10 @@ num_insns_constant_gpr (HOST_WIDE_INT value)
|
|||||||
&& (value >> 31 == -1 || value >> 31 == 0))
|
&& (value >> 31 == -1 || value >> 31 == 0))
|
||||||
return 1;
|
return 1;
|
||||||
|
|
||||||
|
/* PADDI can support up to 34 bit signed integers. */
|
||||||
|
else if (TARGET_PREFIXED_ADDR && SIGNED_34BIT_OFFSET_P (value))
|
||||||
|
return 1;
|
||||||
|
|
||||||
else if (TARGET_POWERPC64)
|
else if (TARGET_POWERPC64)
|
||||||
{
|
{
|
||||||
HOST_WIDE_INT low = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000;
|
HOST_WIDE_INT low = ((value & 0xffffffff) ^ 0x80000000) - 0x80000000;
|
||||||
|
@ -8828,7 +8828,7 @@
|
|||||||
})
|
})
|
||||||
|
|
||||||
;; GPR store GPR load GPR move
|
;; GPR store GPR load GPR move
|
||||||
;; GPR li GPR lis GPR #
|
;; GPR li GPR lis GPR pli GPR #
|
||||||
;; FPR store FPR load FPR move
|
;; FPR store FPR load FPR move
|
||||||
;; AVX store AVX store AVX load AVX load VSX move
|
;; AVX store AVX store AVX load AVX load VSX move
|
||||||
;; P9 0 P9 -1 AVX 0/-1 VSX 0 VSX -1
|
;; P9 0 P9 -1 AVX 0/-1 VSX 0 VSX -1
|
||||||
@ -8838,7 +8838,7 @@
|
|||||||
(define_insn "*movdi_internal64"
|
(define_insn "*movdi_internal64"
|
||||||
[(set (match_operand:DI 0 "nonimmediate_operand"
|
[(set (match_operand:DI 0 "nonimmediate_operand"
|
||||||
"=YZ, r, r,
|
"=YZ, r, r,
|
||||||
r, r, r,
|
r, r, r, r,
|
||||||
m, ^d, ^d,
|
m, ^d, ^d,
|
||||||
wY, Z, $v, $v, ^wa,
|
wY, Z, $v, $v, ^wa,
|
||||||
wa, wa, v, wa, wa,
|
wa, wa, v, wa, wa,
|
||||||
@ -8847,7 +8847,7 @@
|
|||||||
?r, ?wa")
|
?r, ?wa")
|
||||||
(match_operand:DI 1 "input_operand"
|
(match_operand:DI 1 "input_operand"
|
||||||
"r, YZ, r,
|
"r, YZ, r,
|
||||||
I, L, nF,
|
I, L, eI, nF,
|
||||||
^d, m, ^d,
|
^d, m, ^d,
|
||||||
^v, $v, wY, Z, ^wa,
|
^v, $v, wY, Z, ^wa,
|
||||||
Oj, wM, OjwM, Oj, wM,
|
Oj, wM, OjwM, Oj, wM,
|
||||||
@ -8863,6 +8863,7 @@
|
|||||||
mr %0,%1
|
mr %0,%1
|
||||||
li %0,%1
|
li %0,%1
|
||||||
lis %0,%v1
|
lis %0,%v1
|
||||||
|
li %0,%1
|
||||||
#
|
#
|
||||||
stfd%U0%X0 %1,%0
|
stfd%U0%X0 %1,%0
|
||||||
lfd%U1%X1 %0,%1
|
lfd%U1%X1 %0,%1
|
||||||
@ -8886,7 +8887,7 @@
|
|||||||
mtvsrd %x0,%1"
|
mtvsrd %x0,%1"
|
||||||
[(set_attr "type"
|
[(set_attr "type"
|
||||||
"store, load, *,
|
"store, load, *,
|
||||||
*, *, *,
|
*, *, *, *,
|
||||||
fpstore, fpload, fpsimple,
|
fpstore, fpload, fpsimple,
|
||||||
fpstore, fpstore, fpload, fpload, veclogical,
|
fpstore, fpstore, fpload, fpload, veclogical,
|
||||||
vecsimple, vecsimple, vecsimple, veclogical, veclogical,
|
vecsimple, vecsimple, vecsimple, veclogical, veclogical,
|
||||||
@ -8896,7 +8897,7 @@
|
|||||||
(set_attr "size" "64")
|
(set_attr "size" "64")
|
||||||
(set_attr "length"
|
(set_attr "length"
|
||||||
"*, *, *,
|
"*, *, *,
|
||||||
*, *, 20,
|
*, *, *, 20,
|
||||||
*, *, *,
|
*, *, *,
|
||||||
*, *, *, *, *,
|
*, *, *, *, *,
|
||||||
*, *, *, *, *,
|
*, *, *, *, *,
|
||||||
@ -8905,7 +8906,7 @@
|
|||||||
*, *")
|
*, *")
|
||||||
(set_attr "isa"
|
(set_attr "isa"
|
||||||
"*, *, *,
|
"*, *, *,
|
||||||
*, *, *,
|
*, *, fut, *,
|
||||||
*, *, *,
|
*, *, *,
|
||||||
p9v, p7v, p9v, p7v, *,
|
p9v, p7v, p9v, p7v, *,
|
||||||
p9v, p9v, p7v, *, *,
|
p9v, p9v, p7v, *, *,
|
||||||
|
Loading…
Reference in New Issue
Block a user